WBLXT9785HC.D0-865113 Cortina Systems Inc, WBLXT9785HC.D0-865113 Datasheet - Page 6

• Manufacturer Part Number: WBLXT9785HC.D0-865113
• Manufacturer: Cortina Systems Inc

Specifications of WBLXT9785HC.D0-865113

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
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Cortina Systems
Block Diagram ...............................................................................................................................19
RMII 208-Pin PQFP Assignments .................................................................................................21
SMII 208-Pin PQFP Assignments .................................................................................................26
SS-SMII 208-Pin PQFP Assignments ...........................................................................................31
241-Ball BGA23 Assignments (Top View) .....................................................................................51
196-Ball BGA15 Assignments (Top View) .....................................................................................97
Interface Signals ..........................................................................................................................115
Internal Loopback ........................................................................................................................117
Management Interface Read Frame Structure ............................................................................119
Management Interface Write Frame Structure ............................................................................119
Port Address Scheme..................................................................................................................120
Interrupt Logic..............................................................................................................................121
Initialization Sequence.................................................................................................................124
Auto-Negotiation Operation .........................................................................................................128
Typical SMII Interface..................................................................................................................130
Typical SMII Quad Sectionalization .............................................................................................131
100 Mbps Serial MII Data Flow ...................................................................................................132
Serial MII Transmit Synchronization ............................................................................................132
Serial MII Receive Synchronization .............................................................................................133
Typical SS-SMII Interface............................................................................................................135
Typical SS-SMII Quad Sectionalization .......................................................................................136
SS-SMII Transmit Timing ............................................................................................................137
SS-SMII Receive Timing .............................................................................................................137
RMII Data Flow............................................................................................................................138
Typical RMII Interface..................................................................................................................139
Typical RMII Quad Sectionalization.............................................................................................140
100BASE-X Frame Format..........................................................................................................141
Protocol Sublayers ......................................................................................................................142
Typical IP Telephone System Connection...................................................................................147
Cortina Systems
LED Pulse Stretching ..................................................................................................................154
RMII Programmable Out-of-Band Signaling ................................................................................155
LED Circuit ..................................................................................................................................164
Power and Ground Supply Connections .....................................................................................165
Typical Twisted-Pair Interface .....................................................................................................166
Recommended LXT9785/LXT9785E-to-3.3 V Fiber Transceiver Interface Circuitry...................167
Recommended LXT9785/LXT9785E-to-5 V Fiber Transceiver Interface Circuitry......................168
ON Semiconductor Triple PECL-to-LVPECL Translator .............................................................169
SMII - 100BASE-TX Receive Timing ...........................................................................................174
SMII - 100BASE-TX Transmit Timing ..........................................................................................175
SMII - 100BASE-FX Receive Timing ...........................................................................................176
SMII - 100BASE-FX Transmit Timing ..........................................................................................176
SMII - 10BASE-T Receive Timing ...............................................................................................177
SMII - 10BASE-T Transmit Timing ..............................................................................................178
SS-SMII - 100BASE-TX Receive Timing .....................................................................................179
SS-SMII - 100BASE-TX Transmit Timing ....................................................................................180
SS-SMII - 100BASE-FX Receive Timing .....................................................................................180
SS-SMII - 100BASE-FX Transmit Timing ....................................................................................181
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
®
LXT9785E Negotiation Flow Chart.................................................................152
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