M66291GP#201 Renesas Electronics America, M66291GP#201 Datasheet - Page 12

• Manufacturer Part Number: M66291GP#201
• Description: IC USB CONTROLLER GEN-PUR 48LQFP
• Manufacturer: Renesas Electronics America

Specifications of M66291GP#201

• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Current - Supply: 30mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Interface: Serial
• Controller Type: USB 2.0 Controller
• Lead Free Status / RoHS Status: Not Compliant

M 6 6 2 9 1 G P / H P
2.1 USB Operation Enable Register
R e v 1 . 0 1
(1) XCKE (Oscillation Buffer Enable) Bit (b15)
(2) PLLC (PLL Operation Enable) Bit (b14)
.
XCKE
13~12
b15
9~8
7~1
15
14
11
10
USB Operation Enable Register (USB_ENABLE)
0
-
-
b
0
This bit sets enable/disable of the oscillation buffer.
The output clock from the oscillation buffer is supplied to the PLL.
Refer to Figure 2.3.
This bit sets enable/disable of PLL.
When this bit is set to “1”, the external clock into the PLL is multiplied according to the value set in the Xtal
bits before being output to the core block. Set the XCKE bit to “1” and wait until the oscillation circuit starts
and becomes stable before setting this bit to “1”.
When this bit is set to “0”, PLL stops operation and the external clock into the PLL is output to the core block
without being multiplied. Hence, be sure to supply the 48 MHz clock to the oscillation buffer when setting this
bit to “0”.
Refer to Figure 2.3.
2 0 0 4 . 1 1 . 0 1
PLLC
XCKE
Oscillation Buffer Enable
PLLC
PLL Operation Enable
Xtal
Clock Select
SCKE
Internal Clock Enable
USBPC
USB Transceiver Power Control
Tr_on
Tr_on Output Control
Reserved. Set it to “0”.
USBE
USB Module Operation Enable
14
0
-
-
13
0
-
-
p a g e 1 2 o f 1 2 2
Xtal
12
0
-
-
Bit name
SCKE USBPC
11
0
-
-
10
0
-
-
9
0
-
-
Tr_on
0 :
1 :
0 :
1 :
00 : External clock frequency : 48 MHz (PLL through)
10 : External clock frequency : 24 MHz
01 : External clock frequency : 12 MHz
11 : External clock frequency : 6 MHz
0 :
1 :
0 :
1 :
00 : TrON output ="Hi-Z" (SIE operate stop)
01 : TrON output ="L"
10 : Reserved
11 : TrON output ="H"
0 :
1 :
8
0
-
-
Disable oscillation buffer (Disable clock supply to inside
PLL)
Enable oscillation buffer (Enable clock supply to inside
PLL)
Disable PLL (PLL through)
Enable PLL
Disable Internal clock
Enable Internal clock
Disable USB transceiver
Enable USB transceiver
S/W reset state
S/W reset state release
7
0
-
-
6
0
-
-
Function
5
0
-
-
4
0
-
-
3
0
-
-
2
0
-
-
<Address : H’00>
<H/W reset : H'0000>
<USB bus reset : ->
<S/W reset : ->
1
0
-
-
R
0
USBE
b0
0
-
-
W
0