CS9211-VNG National Semiconductor, CS9211-VNG Datasheet - Page 44

• Manufacturer Part Number: CS9211-VNG
• Manufacturer: National Semiconductor

Specifications of CS9211-VNG

• Operating Temperature (max): 85C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

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Register Descriptions
Offset 40Ch-40Fh
31:16
15:13
17:0
9:7
6:4
3:1
Bit
21
20
19
18
12
11
10
PWRUP_PHASE_
PWRDN_PHASE_
PWRDN_PHASE_
PWRDN_PHASE_
GRAY_SCALE_
DITHER_RAM_
NO_OF_FRM
INTENSITIES
DITH_BITS
REF_CYC
ROM_SEL
NEG_IMG
Name
RSVD
RSVD
RSVD
SEL
0
0
1
2
Description
Panel Power-Up Phase 0: Selects the interval between disabling FP_VCONEN to disabling DIS-
POFF#. This bit is ineffective if independent DISPOFF# control is selected by bit 25.
0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.
Panel Power-Down Phase 0: Selects the interval between disabling panel DISPOFF# to disabling
FP_VCONEN. See Figure 3-13 on page 37. This bit is ineffective if independent DISPOFF# control is
selected by bit 25. 0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.
Panel Power-Down Phase 1: Selects the interval between disabling FP_VCONEN to disabling the
panel data signals. See Figure 3-13 on page 37.
0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.
Panel Power-Down Phase 2: Selects the interval between disabling the panel data signals to dis-
abling panel FP_VDDEN. See Figure 3-13 "Panel Power Sequence" on page 37.
0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.
Reserved: These bits are not defined.
Reserved: These bits are not defined
Refresh Cycle Select Bits: Selects the number of refresh cycles for the SDRAM. These cycles occur
during the retrace time at the end each line.
000 = Generate three refresh cycles for the external frame buffer.
001 = Generate one refresh cycle for the external frame buffer.
010 = Generate five refresh cycles for the external frame buffer.
Others = Reserved.
Dither RAM or ROM Select: This bit selects either internal ROM or internal RAM as the source of the
dither patterns.
0 = Selects fixed (internal to CS9211) ROM for dither patterns (Default).
1 = Selects programmable (internal to CS9211) RAM for dither patterns.
To update the dither RAM, this bit must = 1.
Note: See Offset 424h[6].
Gray Scale Selection: This bit chooses two methods of converting an incoming color pixel stream to
shades of gray for display on monochrome panels. This bit is ignored if Offset 404h[19] is set to 0
(color mode).
0 = Green color only - Only the green pixel data input is used to generate the gray shades.
1 = NTSC weighting - Red, blue and green pixel color inputs are used to generate the gray shades for
the monochrome panel.
Negative Image: This bit converts the black to white and white to black and all colors in between to
their logical inverse to provide a negative image of the original image. It acts as though the incoming
data stream were logically inverted (1 becomes 0 and 0 becomes 1).
0 = Normal display mode; 1 = Negative image display mode.
Reserved: This bit is not defined.
Number Of FRM Intensities: The value set by bits [6:4] is the number of intensities that will exist due
to Frame Rate Modulation, prior to dithering. This field selects how many of the incoming most signifi-
cant (MS) data bits (per color) are used to generate the FRM intensities.
000 = 2 FRM intensities (selects 1 MS (most significant) bit for use by FRM).
001 = 4 FRM intensities (selects 2 MS bits for use by FRM).
010 = 8 FRM intensities (selects 3 MS bits for use by FRM).
011 = 16 FRM intensities (selects 4 MS bits for use by FRM).
100 = 32 FRM intensities (selects 5 MS bits for use by FRM).
101, 110, 111 = Reserved.
Dithering Bits Select: This field is used to select the number of least-significant (LS) bits to be used
for the dithering pattern. Dither bits are the least-significant bits of each pixel’s color value.
000 = Reserved
001 = Selects 5 LS bits as dither bits. Number of FRM intensities should be 2 (i.e., bits [6:4] = 000).
010 = Selects 4 LS bits as dither bits. Number of FRM intensities should be 4 (i.e., bits [6:4] = 001).
011 = Selects 3 LS bits as dither bits. Number of FRM intensities should be 8 (i.e., bits [6:4] = 010).
100 = Selects 2 LS bits as dither bits. Number of FRM intensities should be 16 (i.e., bits [6:4] = 011).
101 = Selects LS 1 bit as a dither bit. Number of FRM intensities should be 32 (i.e., bits [6:4] = 100).
(Continued)
Table 4-2. Configuration Registers (Continued)
Dither and Frame Rate Control Register (R/W)
44
Reset Value = 00000000h
Revision 2.1