LSISAS1068 LSI, LSISAS1068 Datasheet - Page 143

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

designed maximum memory read byte count bit
designed maximum outstanding split transactions
detected parity error (from slave) bit
device complexity bit
device driver stability
device ID configuration 3-16,
device ID register
device number bit
device specific initialization bit
DEVSEL/ 3-5,
DEVSEL/ timing bit
diagnostic memory
diagnostic memory enable bit
diagnostic read/write address register 4-33, 4-35,
diagnostic read/write data register 4-33, 4-35,
diagnostic read/write enable bit
diagnostic write enable bit 4-33, 4-34,
DisARM bit
DMA
doorbell 2-8,
dual address cycles command 2-9, 2-11,
E
electrostatic discharge
enable
ESD
expansion ROM base address
expansion ROM base address register
expansion ROM enable bit
external
4-29
bit
4-36
4-36,
host
interrupt mask bit
status bit
system 4-32,
system interface
system interrupt bit
bus mastering bit
diagnostic memory bit
diagnostic write bit
I/O space bit
memory space bit
MSI bit
parity error response bit
write and invalidate bit
5-2
2-16
4-29
4-33
4-37
4-21
4-35
4-37
2-9
5-4
4-37
4-5
4-3
4-30
4-31
4-6
2-8
4-4
4-38
4-30
4-5
1-6
Index
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
4-34
4-37
5-2
4-35
4-4
4-14
4-4
3-17
4-35
4-17
4-5
4-35
4-5
4-36
4-13
2-15
F
FAULT_LED[7:0]/
FIFO
flash ROM
flash ROM size
FLASH_CS/
FRAME/ 3-5,
frames
FSELA 3-11,
function number bit
Fusion-MPT 1-1, 1-4, 1-5, 2-1, 2-4, 2-8,
G
general description
GNT/ 2-24, 3-5,
GPIO[3:0]
GPIO[7:0]
H
HB_LED/
header type register
high priority request FIFO
high priority request MFA
host diagnostic register 4-33, 4-34,
host doorbell value
host interface module 2-2,
host interrupt mask register 2-17, 3-6, 4-37,
host interrupt status register 4-37,
host system
hot swap enable 3-16,
I
I/O
clock
memory interface
memory interface timing diagrams
reply free
reply post 2-8,
request post
bad signature bit
signature recognition
size
reply message 2-8,
request message 2-8,
base address
base address register 2-4, 2-10,
2-4
3-16
5-9
3-11
3-11
3-18
2-8
3-9
2-8
3-18
5-4
2-8
3-17
5-4
4-5
4-37
3-11
1-1
4-33
4-31
4-34
4-9
2-20
2-16
3-17
2-23
2-16
4-40
2-4
2-4
4-38
4-36
4-9
5-11
4-31
4-38
IX-3