LSISAS1068 LSI, LSISAS1068 Datasheet - Page 84
LSISAS1068
Manufacturer Part Number
LSISAS1068
Description
Manufacturer
LSI
Datasheet
1.LSISAS1068.pdf
(152 pages)
Specifications of LSISAS1068
Lead Free Status / RoHS Status
Not Compliant
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4-14
31
0
0
0
0
0
0
0
Register: 0x34
Capabilities Pointer
Read Only
Register: 0x35–0x37
Reserved
Register: 0x38–0x3B
Reserved
PCI Host Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
23
24 23
0
0
0
7
x
0
0
0
0
0
0
x
0
Expansion ROM Enable
This bit controls if the device accepts accesses to its
expansion ROM. Setting this bit enables address
decoding. Depending on the system configuration, the
device can optionally use an expansion ROM. Note that
to access the expansion ROM, the user must also set
bit 1 in the PCI
Capabilities Pointer
This register indicates the location of the first extended
capabilities register in PCI Configuration Space. The
value of this register varies according to system
configuration.
Reserved
This register is reserved.
Reserved
This register is reserved.
0
0
0
0
0
16 15
x
0
Reserved
16 15
0
0
0
0
Capabilities Pointer
0
x
0
Command
Reserved
0
0
0
0
0
x
0
0
register.
0
0
8
0
8
0
x
7
0
7
0
0
0
0
0
x
0
0
0
0
0
0
[23:0]
[31:0]
0
x
0
0
[7:0]
0
0
0
0
0