LSISAS1068 LSI, LSISAS1068 Datasheet - Page 39

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LSISAS1068

Manufacturer Part Number
LSISAS1068
Description
Manufacturer
LSI
Datasheet

Specifications of LSISAS1068

Lead Free Status / RoHS Status
Not Compliant

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2.3.2.7
2.3.2.8
2.3.2.9
2.3.2.10
2.3.2.11
Memory Write Command
Alias to Memory Read Block Command
Alias to Memory Write Block Command
Configuration Read Command
Configuration Write Command
read if such a read produces no side effects. The LSISAS1068 supports
this command when operating in the PCI-X bus mode.
The Memory Write command writes data to an agent mapped in the
memory address space. The target assumes responsibility for data
coherency when it returns “ready.” The LSISAS1068 supports this
command when operating in either the PCI or PCI-X bus mode.
This command is reserved for future implementations of the PCI
specification. The LSISAS1068 never generates this command as a
master. When a slave, the LSISAS1068 supports this command using
the Memory Read Block command.
This command is reserved for future implementations of the PCI
specification. The LSISAS1068 never generates this command as a
master. When a slave, the LSISAS1068 supports this command using
the Memory Write Block command.
The Configuration Read command reads the configuration space of a
device. The LSISAS1068 never generates this command as a master,
but does respond to it as a slave. A device on the PCI bus selects the
LSISAS1068 by asserting its IDSEL signal when AD[1:0] equal 0b00.
During the address phase of a configuration cycle, AD[7:2] address one
of the 64 Dword registers in the configuration space of each device.
C_BE[3:0]/ address the individual bytes within each Dword register and
determine the type of access to perform. Bits AD[10:8] address the PCI
function Configuration Space (AD[10:8] = 0b000). The LSISAS1068
treats AD[63:11] as logical don’t cares.
The Configuration Write command writes the configuration space of a
device. The LSISAS1068 never generates this command as a master,
but does respond to it as a slave. A device on the PCI bus selects the
PCI Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
2-13

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