LSISAS1068 LSI, LSISAS1068 Datasheet - Page 67

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

Table 3.15
3.12 Power-On Sense Pins Description
Signal Name
RX_VDD[7:0]
RXB_VDD[7:0]
TX_VDD[7:0]
TXB_VDD[7:0]
NC
Power and Ground Signals (Cont.)
BGA Position
E6, D7, D9, B10, D15, C18, D19,
E21
G8, E9, C10, A12, E15, F17,
C19, C23
E5, C4, D8, D10, D14, C17, D18,
A23
G7, C8, E10, F12, A14, F16,
E18, F20
C2, C25, D3, D23, E1, E24, G5,
H5, J2, J5, J21, J26, K5, K6,
K21, L5, L6, L21, L22, M22, N1,
N21, N25, P6, P21, R5, R22, T5,
U21, U22, V22, W2, W6, Y5, Y7,
Y21, AA7, AA8, AA9, AA13,
AA14, AA15, AA17, AA18, AA21,
AB3, AB8, AB10, AB11, AB12,
AB17, AB19, AB23, AB26,
AC13, AD4, AD9, AD18, AE9,
AE14, AE18, AE25, AF15, AF17,
AF18, AF21
This section discusses the power-on sense pin configuration options. For
setting global operating conditions, the LSISAS1068 uses power-on
sense register bits that source their data from the state of the memory
address/data bus (MAD[31:0]) during the device boot up sequence. The
MAD signals are 3-stated and read continuously during PCI reset, and
are latched upon removal of the PCI reset signal. Each of these pins
contains an internal pull-down resistor and senses the presence of an
external 4.7 k
Provide pull-up options for all MAD[31:0] bus signals. Pull all reserved
MAD bus signals LOW.
options.
Power-On Sense Pins Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
pull-up resistor that is tied to 3.3 V Vdd power.
Table 3.16
Type Description
P
P
P
P
These signals provide 1.2 V power for the
GigaBlaze core.
No connect.
describes the power-on sense
3-15