LSISAS1068 LSI, LSISAS1068 Datasheet - Page 40

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

2.3.2.12
2.3.2.13
2-14
Memory Read Multiple Command
Split Completion Command
LSISAS1068 by asserting its IDSEL signal when bits AD[1:0] equal 0b00.
During the address phase of a configuration cycle, bits AD[7:2] address
one of the 64 Dword registers in the configuration space of each device.
C_BE[3:0]/ address the individual bytes within each Dword register and
determine the type of access to perform. Bits AD[10:8] decode the PCI
function Configuration Space (AD[10:8] = 0b000). The LSISAS1068
treats AD[63:11] as logical don’t cares.
The Memory Read Multiple command is identical to the Memory Read
command, except it additionally indicates that the master intends to fetch
multiple cache lines before disconnecting. The LSISAS1068 supports
PCI Memory Read Multiple functionality when operating in the PCI mode
and determines when to issue a Memory Read Multiple command
instead of a Memory Read command.
Burst Size Selection – The Read Multiple command reads multiple
cache lines of data during a single bus ownership. The number of cache
lines the LSISAS1068 reads is a multiple of the cache line size, which
Revision 3.0 of the PCI specification provides. The LSISAS1068 selects
the largest multiple of the cache line size based on the amount of data
to transfer.
Split transactions in PCI-X replace the delayed transactions in
conventional PCI. The LSISAS1068 supports up to 16 outstanding split
transactions when operating in the PCI-X mode. A split transaction
consists of at least two separate bus transactions: a split request, which
the requester initiates, and one or more split completion commands,
which the completer initiates. Revision 2.0 of the PCI-X addendum
permits split transaction completion for the Memory Read Block, Alias to
Memory Read Block, Memory Read Dword, Interrupt Acknowledge,
I/O Read, I/O Write, Configuration Read, and Configuration Write
commands. When operating in the PCI-X mode, the LSISAS1068
supports the Split Completion command for all of these commands
except the Interrupt Acknowledge command, which the LSISAS1068
neither responds to nor generates.
Functional Description
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