N681622YG Nuvoton Technology Corporation of America, N681622YG Datasheet - Page 108

• Manufacturer Part Number: N681622YG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of N681622YG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

LS:LS[3:0] is the Linefeed Status Register bits which reflects the programmed linefeed state, not necessarily the
actual linefeed state. See LS:SLS[3:0] definition. When automatic transitions occur LS:LS[3:0] will also update
accordingly.
SLS[3:0] is the Shadow Linefeed Status Register bits which reflects the actual real-time linefeed state. Automatic
operations may cause actual linefeed state to deviate from the state defined in LS:LS[3:0]. For example when
LS:LS[3:0] is programmed for ‘Ringing’ state, LS:SLS[3:0] will only indicate ‘Ringing’ during the actual RING burst.
During the RING cadence LS:SLS[3:0] will indicate ‘ON-HOOK Transmission’. This register has the same setting as
the Linefeed Status Register bits.
“ RES ” in the register map means reserved bit(s). To convert Current Limit decimal value to hex value please refer to
the beginning of this section (Register Description).
Addr.
0x44
Addr.
0x45
Preliminary Datasheet Rev1.0
14.7.5. LINEFEED STATUS
14.7.6. LOOP CURRENT LIMIT
Name
Name
LCL
LS
LS3
0
0
0
0
0
0
0
0
1
1
1
LGCRT
D7
D7
Range
LS2
0
0
1
1
0
1
0
0
1
1
1
D6
LGCRR
SLS[3:0]
D6
20 mA [0x00]
LS1
Minimum
0
0
1
1
0
0
1
1
0
0
1
D5
Page 108 of 164
LineFeed Status
CURRENT LIMIT [ILM[2:0]]
D5
LS0
LGCM[1:0]
0
1
0
1
0
1
0
1
1
1
0
D4
Open
TIP Open
Ringing
RING Open
Forward Idle
Calibration Mode
Forward Active
Forward ON-HOOK Transmission
Reverse Active
Reverse ON-HOOK Transmission
Reverse Idle
D4
41 mA [0x07]
Single Programmable Extended Codec/SLCC
Maximum
D3
RES
D3
State
D2
Increment
LS[3:0]
D2
3 mA
D1
ILM[2:0]
D1
N681386/87
D0
D0
January 2010
Default
Default
0x00
0x00