N681622YG Nuvoton Technology Corporation of America, N681622YG Datasheet - Page 74

• Manufacturer Part Number: N681622YG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of N681622YG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

The following Power-on Reset procedure is recommended for the N681386/87.
12-bit Read data
Preliminary Datasheet Rev1.0
The Reset pin (RESETb) should be held LOW as power is applied.
This allows logic levels to rise so that all output pins and all registers reach their default values while the system
is in reset mode. This process should take less than 100 μs if the external supply is settled.
Clocking should be applied (BCLK and, if necessary, FS)
Ensure CSb and SCLK are set HIGH before setting RESETb HIGH
Wait at least 400μs to ensure the PLL is locked. The status can be read in register PLLS:PL[0] address (0x04)
Initialize all appropriate country specific registers and mode registers according to specific operating mode
SCLK
SCLK
SDO
SDO
CSb
CSb
SDI
SDI
12.3. POWER-ON RESET
1
1
2
2
DEVICE ADDRESS
DEVICE ADDRESS
3
3
4
4
11
5
5
6
6
10
7
7
9
8
8
8
Figure 35: SPI 12-bits Read sequence
7
1
1
6
2
2
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5
3
3
ADDRESS
ADDRESS
4
4
4
5
5
3
6
6
2
7
7
1
Single Programmable Extended Codec/SLCC
8
8
0
1
1
2
2
3
3
DATA [7:0]
DATA [7:0]
4
4
5
5
6
6
7
7
N681386/87
8
8
January 2010
Read 1
Read 2