PIC24FV32KA304-I/PT Microchip Technology, PIC24FV32KA304-I/PT Datasheet - Page 151

• Manufacturer Part Number: PIC24FV32KA304-I/PT
• Description: MCU 32KB FLASH 2KB RAM 44-TQFP
• Manufacturer: Microchip Technology

Specifications of PIC24FV32KA304-I/PT

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-44
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.0
All devices in the PIC24FV32KA304 family features
3 independent input capture modules. Each of the
modules offers a wide range of configuration and
operating options for capturing external pulse events
and generating interrupts.
Key features of the input capture module include:
• Hardware-configurable for 32-bit operation in all
• Synchronous and Trigger modes of output
• A 4-level FIFO buffer for capturing and holding
• Configurable interrupt generation
• Up to 6 clock sources available for each module,
The module is controlled through two registers: ICxCON1
(Register
block diagram of the module is shown in
FIGURE 14-1:
 2011 Microchip Technology Inc.
Trigger and
Sync Sources
Note:
modes by cascading two adjacent modules
compare operation, with up to 20 user-selectable
trigger/sync sources available
timer values for several events
driving a separate internal 16-bit counter
IC Clock
Sources
ICx Pin
INPUT CAPTURE WITH
DEDICATED TIMERS
14-1) and ICxCON2
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended
reference source. For more information,
refer to the “PIC24F Family Reference
Manual”, Section 34. “Input Capture
with Dedicated Timer” (DS39722).
ICTSEL<2:0>
Trigger and
Sync Logic
Prescaler
Counter
1:1/4/16
INPUT CAPTURE BLOCK DIAGRAM
Select
Clock
to
be
(Register
Increment
Reset
a
comprehensive
ICM<2:0>
14-2). A general
Figure
SYNCSEL<4:0>
Trigger
Clock Synchronizer
Edge Detect Logic
14-1.
ICxTMR
and
PIC24FV32KA304 FAMILY
14.1
14.1.1
By default, the input capture module operates in a
free-running mode. The internal 16-bit counter,
ICxTMR, counts up continuously, wrapping around
from FFFFh to 0000h on each overflow, with its period
synchronized to the selected external clock source.
When a capture event occurs, the current 16-bit value
of the internal counter is written to the FIFO buffer.
In Synchronous mode, the module begins capturing
events on the ICx pin as soon as its selected clock
source is enabled. Whenever an event occurs on the
selected sync source, the internal counter is reset. In
Trigger mode, the module waits for a Sync event from
another internal module to occur before allowing the
internal counter to run.
Standard, free-running operation is selected by setting
the SYNCSEL bits to ‘00000’ and clearing the ICTRIG
bit (ICxCON2<7>). Synchronous and Trigger modes
are selected any time the SYNCSEL bits are set to any
value except ‘00000’. The ICTRIG bit selects either
Synchronous or Trigger mode; setting the bit selects
Trigger mode operation. In both modes, the SYNCSEL
bits determine the sync/trigger source.
When the SYNCSEL bits are set to ‘00000’ and
ICTRIG is set, the module operates in Software Trigger
mode. In this case, capture operations are started by
manually setting the TRIGSTAT bit (ICxCON2<6>).
16
General Operating Modes
SYNCHRONOUS AND TRIGGER
MODES
4-Level FIFO Buffer
ICOV, ICBNE
Event and
ICI<1:0>
Interrupt
ICxBUF
Logic
Set ICxIF
DS39995B-page 151
16
16
System Bus