PIC24FV32KA304-I/PT Microchip Technology, PIC24FV32KA304-I/PT Datasheet - Page 190

• Manufacturer Part Number: PIC24FV32KA304-I/PT
• Description: MCU 32KB FLASH 2KB RAM 44-TQFP
• Manufacturer: Microchip Technology

Specifications of PIC24FV32KA304-I/PT

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-44
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
19.2
The RTCC module registers are organized into three
categories:
• RTCC Control Registers
• RTCC Value Registers
• Alarm Value Registers
19.2.1
To limit the register interface, the RTCC Timer and
Alarm
corresponding register pointers. The RTCC Value
register window (RTCVALH and RTCVALL) uses the
RTCPTR bits (RCFGCAL<9:8>) to select the desired
Timer register pair (see
By writing the RTCVALH byte, the RTCC Pointer value,
the RTCPTR<1:0> bits decrement by one until they
reach ‘00’. Once they reach ‘00’, the MINUTES and
SECONDS value will be accessible through RTCVALH
and RTCVALL until the pointer value is manually
changed.
TABLE 19-1:
The Alarm Value register window (ALRMVALH and
ALRMVALL)
(ALCFGRPT<9:8>) to select the desired Alarm
register pair (see
By writing the ALRMVALH byte, the Alarm Pointer
value (ALRMPTR<1:0> bits) decrements by one until
they reach ‘00’. Once they reach ‘00’, the ALRMMIN
and ALRMSEC value will be accessible through
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
EXAMPLE 19-1:
DS39995B-page 190
RTCPTR<1:0>
asm volatile(“push w7”);
asm volatile(“push w8”);
asm volatile(“disi #5”);
asm volatile(“mov #0x55, w7”);
asm volatile(“mov w7, _NVMKEY”);
asm volatile(“mov #0xAA, w8”);
asm volatile(“mov w8, _NVMKEY”);
asm volatile(“bset _RCFGCAL, #13”); //set the RTCWREN bit
asm volatile(“pop w8”);
asm volatile(“pop w7”);
00
01
10
11
Time
RTCC Module Registers
REGISTER MAPPING
registers
uses
RTCVAL<15:8>
RTCVAL REGISTER MAPPING
Table
RTCC Value Register Window
WEEKDAY
MINUTES
MONTH
SETTING THE RTCWREN BIT
Table
19-2).
—
the
are
19-1).
accessed
ALRMPTR
RTCVAL<7:0>
SECONDS
HOURS
YEAR
DAY
through
bits
TABLE 19-2:
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes, the ALRMPTR<1:0> value will be
decremented. The same applies to the RTCVALH or
RTCVALL bytes with the RTCPTR<1:0> being
decremented.
19.2.2
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RTCPWC<13>) must be
set (see
19.2.3
There are four reference source clock options that can
be selected for the RTCC using the RTCCSEL<1:0>
bits; 00 = secondary oscillator, 01 = LPRC, 10 = 50 Hz
external clock, and 11 = 60 Hz external clock.
ALRMPTR
Note:
Note:
<1:0>
00
01
10
11
Example
This only applies to read operations and
not write operations.
WRITE LOCK
To avoid accidental writes to the timer, it is
recommended that the RTCWREN bit
(RCFGCAL<13>) is kept clear at any
other time. For the RTCWREN bit to be
set, there is only one instruction cycle time
window allowed between the 55h/AA
sequence and the setting of RTCWREN.
Therefore, it is recommended that code
follow the procedure in
SELECTING RTCC CLOCK SOURCE
ALRMVAL<15:8> ALRMVAL<7:0>
19-1).
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
PWCSTAB
ALRMMIN
ALRMWD
 2011 Microchip Technology Inc.
Example
PWCSAMP
ALRMSEC
ALRMDAY
ALRMHR
19-1.