LMH2190TM-38/NOPB National Semiconductor, LMH2190TM-38/NOPB Datasheet - Page 14

• Manufacturer Part Number: LMH2190TM-38/NOPB
• Description: IC CLOCK QUAD 26MHZ DVR 16-USMD
• Manufacturer: National Semiconductor
• Type: Fanout Buffer (Distribution)r

Specifications of LMH2190TM-38/NOPB

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: No/No
• Input: Clock
• Output: Clock
• Frequency - Max: 27MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MicroSMD
• Frequency-max: 27MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH2190TM-38TR

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be greater than the LDO voltage of 1.8V, but not more than
the supply voltage (V
The System Clock Request Output pin can be used to enable
or disable an external TCXO to save power consumption. A
typical application diagram is shown in
powers the TCXO, while the SCLK_REQ enables or disables
the TCXO. If the TXCO doesn't have an enable pin, power
savings can be realized by switching off the LMH2190's LDO
and therewith the TCXO.
Note that the LMH2190 initializes to its default settings when
V
it's default state until it is configured through I
BAT
FIGURE 10. TCXO Powered from LMH2190's LDO
is powered-up. As a consequence, the LMH2190 is in
BAT
) of the LMH2190.
Figure
FIGURE 9. System Clock Request Output
2
C. Because of
10. The LDO
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14
this configuration the CLK1/2/3/4 outputs may transmit the
clock to a peripheral upon startup when it is not requested by
the peripheral and before the device is initialized through the
I
tings of the device for SCLK_REQ and CLK_REQ1/2/3/4
polarities do not correspond to what is expected by the TCXO
and the peripheral. Care must be taken to prevent any un-
wanted behavior in the peripheral device until the I
correctly configures the device. The setting of the registers is
maintained as long as the V
LOW DROPOUT REGULATOR
The linear and low dropout regulator (LDO) is used to regulate
the input voltage, V
voltage. This allows the LMH2190 to suppress V
ripples. A voltage ripple would distort clock edges causing
phase noise on the distributed clock signal.
In default mode the LDO is powered-up when one or more
Clock Request inputs are high. Therefore the Clock Request
Logic needs to be powered continuously such that it can
wake-up the LMH2190 and its LDO. The V
takes care of supplying the Clock Request Logic can therefore
be driven by either the LDO output voltage or the ENABLE
signal. Normally the V
output, unless the LDO is in a low power shutdown mode. In
that case the ENABLE signal will drive V
soon as there is a clock request, the built in LDO will power
up and takes over the sourcing of V
signal.
2
C port. This may happen for instance when the default set-
BAT
, to generate an accurate 1.8V supply
DD_IO
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BAT
signal is connected to the LDO
voltage is present.
DD_IO
DD_IO
from the ENABLE
DD_IO
(Figure
voltage that
BAT
2
voltage
11). As
C port