LMH2190TM-38/NOPB National Semiconductor, LMH2190TM-38/NOPB Datasheet - Page 18

IC CLOCK QUAD 26MHZ DVR 16-USMD

LMH2190TM-38/NOPB

Manufacturer Part Number
LMH2190TM-38/NOPB
Description
IC CLOCK QUAD 26MHZ DVR 16-USMD
Manufacturer
National Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of LMH2190TM-38/NOPB

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
Clock
Output
Clock
Frequency - Max
27MHz
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-MicroSMD
Frequency-max
27MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMH2190TM-38TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMH2190TM-38/NOPB
Manufacturer:
NS
Quantity:
270
www.national.com
Field
Output Mode
Clock Request Output Type
Clock Request Output Polarity
Clock Request Output Mode
Clock Input Type
LDO Mode
Reserved
Field
CLK1 Load
CLK_REQ1 Input Polarity
CLK_REQ1 Force ON Control
CLK_REQ1 Force OFF Control
CLK_REQ1 Pull down Resistor
Reserved
Reserved
I
Address = 00H, type = R/W, reset value = 44H, 0100_0100, Bold face settings are the default configuration.
Address = 01H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration.
2
C Registers
Bits
[6-5]
Bits
[1-0]
[0]
[1]
[2]
[3]
[4]
[7]
[2]
[3]
[4]
[5]
[6]
[7]
Description
Sets the timing relationship of the clock outputs
0 - All 4 outputs are skewed from each other
1 - Two pair of outputs where one output of the pair is the inversion of the other and the
second pair is skewed from the first pair.
Sets whether the output is push-pull or open drain.
0 - Push-Pull Output
1 - Open Drain/Source Output (Open drain with Active low output, Open source with
Active high output).
Sets whether the clock request output is active low or active high.
0 - Active low output
1 - Active high output
Sets how the clock request output operates.
0 - Use clock request inputs
1 - Force the clock request output to be asserted.
Sets whether the input is AC or DC coupled.
0 - AC coupled
1 - DC coupled
Sets the regulator mode of operation.
00 - OFF
01 - Reserved
10 - Track Clock Requests
11 - Force ON
Description
Sets the drive strength of the clock output based on the capacitive load.
00 - 10pF to 15pF
01 - 15pF to 22.5pF
10 - 22.5pF to 33.5pF
11 - 33.5pF to 50pF
Sets whether a logic low or high enables the clock output.
0 - Logic low enables the clock output.
1 - Logic high enables the clock output.
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be enabled (Force ON).
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be disabled (Force OFF). ”Force OFF" overrides ”Force
ON".
Selects whether an internal 200 kΩ pull down resistor on the clock request input to GND
is present.
0 - No internal pull down resistor is present.
1 - Internal 200 kΩ pull-down resistor is present.
TABLE 2. Configuration Register
TABLE 3. CLK1 Output Register
18
2
2
C logic to enable the output.
C logic to disable the output.
(Figure
7).

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