PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 266

• Manufacturer Part Number: PIC18F86K90-I/PT
• Description: 64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K90 FAMILY
REGISTER 19-4:
19.4.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can simultaneously be available on
multiple pins.
Once
(CCPxM<3:2> = 11 and PxM<1:0> = 00 of the
CCPxCON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits
(PSTRxCON<3:0>), as provided in Table 19-3.
DS39957B-page 266
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Note:
PxRSEN
R/W-0
the
PULSE STEERING MODE
The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.
Single
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPxASE must be cleared by software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
PxDCn = Number of F
should transition active and the actual time it does transition active.
PxDC6
R/W-0
away; the PWM restarts automatically
ECCPxDEL: ENHANCED PWM CONTROL REGISTER
Output
W = Writable bit
‘1’ = Bit is set
mode
PxDC5
R/W-0
OSC
is
/4 (4 * T
selected
PxDC4
R/W-0
Preliminary
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PxDC3
R/W-0
While the PWM Steering mode is active, the
CCPxM<1:0> bits (CCPxCON<1:0>) select the PWM
output polarity for the Px<D:A> pins.
The PWM auto-shutdown operation also applies to the
PWM Steering mode, as described in Section 19.4.4
“Enhanced
auto-shutdown event will only affect pins that have
PWM outputs enabled.
PxDC2
R/W-0
PWM
Auto-shutdown
 2010 Microchip Technology Inc.
x = Bit is unknown
PxDC1
R/W-0
mode”.
PxDC0
R/W-0
bit 0
An