PEF2054NV21XK Lantiq, PEF2054NV21XK Datasheet - Page 259

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PEF2054NV21XK

Manufacturer Part Number
PEF2054NV21XK
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XK

Lead Free Status / Rohs Status
Compliant
Figure 98
EPIC
Semiconductor Group
POFD
OFD2..9 = Offset Downstream (see PCSR for OFD0..1)
POFU
OFU2..9 = Offset Upstream (see PCSR for OFU0..1)
PCSR
OFD0..1 = Offset Downstream (see POFD)
DRE = Downstream Rising Edge,
OFU0..1 = Offset Upstream (see POFU)
URE = Upstream Rising Edge,
®
Mode 0: (BND – 17 + BPF) mod BPF --> OFD2..9
Mode 1: (BND – 33 + BPF) mod BPF --> OFD1..9
Mode 2: (BND – 65 + BPF) mod BPF --> OFD0..9
BND = number of bits + 1 that the downstream frame start is left shifted relative to the
BPF = number of bits per frame
Unused bits must be set to 0 !
Mode 0: (BND + 23 + BPF) mod BPF --> OFU2..9
Mode 1: (BND + 47 + BPF) mod BPF --> OFU1..9
Mode 2: (BND + 95 + BPF) mod BPF --> OFU0..9
BND = number of bits + 1 that the upstream frame is left shifted relative to the frame start
BPF = number of bits per frame
Unused bits must be set to 0 !
Initialization Register Summary (working sheet)
0
frame sync
0 = receive data on falling edge,
1 = receive data on rising edge
0 = send data on falling edge,
1 = send data on rising edge
PCM Offset Downstream Register RW, 24
PCM Offset Upstream Register
PCM Clock Shift Register
OFD1..0
DRE
OFD9..2
OFU9..2
259
RW, 26
RW, 28
0
H
H
H
(2
(3
(4
H
H
H
+ RBS = 1), reset-val. = 0
+ RBS = 1), reset-val. = 0
+ RBS = 1), reset-val. = 0
OFU1..0
PEB 2055
PEF 2055
URE
Appendix

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