IDT82V3355TF IDT, Integrated Device Technology Inc, IDT82V3355TF Datasheet - Page 60

IDT82V3355TF

Manufacturer Part Number
IDT82V3355TF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V3355TF

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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INTERRUPTS2_STS - Interrupt Status 2
Programming Information
IDT82V3355
Address: 0EH
Type: Read / Write
Default Value: 00XXXXX1
T0_OPERATING
5 - 1
Bit
7
6
0
_MODE
7
T0_OPERATING_MODE
T0_MAIN_REF_FAILED
IN3_CMOS
T0_MAIN_REF_F
Name
-
AILED
6
This bit indicates the operating mode switch for T0 DPLL; i.e., whether the value in the
T0_DPLL_OPERATING_MODE[2:0] bits (b2~0, 52H) changes.
0: Has not switched. (default)
1: Has switched.
This bit is cleared by writing a ‘1’.
This bit indicates whether the T0 selected input clock has failed. The T0 selected input clock fails when its validity
changes from ‘valid’ to ‘invalid’; i.e., when there is a transition from ‘1’ to ‘0’ on the corresponding INn_CMOS / INn_DIFF
bit (4AH, 4BH).
0: Has not failed. (default)
1: Has failed.
This bit is cleared by writing a ‘1’.
Reserved.
This bit indicates the validity changes (from ‘valid’ to ‘invalid’ or from ‘invalid’ to ‘valid’) for IN3_CMOS for T0 path, i.e.,
whether there is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the corresponding IN3_CMOS bit (b0, 4BH).
0: Has not changed.
1: Has changed. (default)
This bit is cleared by writing a ‘1’.
5
-
4
-
60
3
-
Description
2
-
SYNCHRONOUS ETHERNET WAN PLL
1
-
IN3_CMOS
May 19, 2009
0

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