LC5512MB-75F256I Lattice, LC5512MB-75F256I Datasheet - Page 33

• Manufacturer Part Number: LC5512MB-75F256I
• Description: LATLC5512MB-75F256I 512MC CPLD 150K Gate
• Manufacturer: Lattice

ispXPLD 5000MX Family Internal Switching Characteristics (Continued)
Lattice Semiconductor
Registered Delays
t
t
t
t
t
t
t
t
t
t
Latched Delays
t
t
t
t
t
Reset and Set Delays
t
t
eXtended Function Routing Delays
t
S
S_PT
H
COi
CESi
CEHi
SIR
SIR_PT
HIR
HIR_PT
SL
SL_PT
HL
GOi
PDLi
SRi
SRR
ROUTEMF
Parameter
D-Register Setup
Time, Global Clock
D-Register Setup
Time, PT Clock
D-Register Hold
Time
Register Clock to
OSA Time
Clock Enable Setup
Time
Clock Enable Hold
Time
D-Input Register
Setup Time, Global
Clock
D-Input Register
Setup Time, PT
Clock
D-Input Register
Hold Time, Global
Clock
D-Input Register
Hold Time, PT
Clock
Latch Setup Time,
Global Clock
Latch Setup Time,
PT Clock
Latch Hold Time
Latch Gate to OSA
Time
Propagation Delay
through Latch to
OSA Transparent
Asynchronous
Reset or Set to OSA
Delay
Asynchronous
Reset or Set
Recovery
Delay through SRP
when Implementing
Memory Functions
Description
Over Recommended Operating Conditions
Parameter
Base
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-0.13
-0.06
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
0.28
1.90
1.07
0.00
0.66
0.42
0.84
0.00
0.18
0.18
—
—
—
—
—
—
-4
0.72
0.07
0.52
0.23
0.42
2.00
—
—
—
—
—
—
—
—
—
—
—
—
33
-0.11
0.31
2.56
1.20
0.00
0.20
0.37
1.31
0.00
0.00
0.00
0.00
—
—
—
—
—
—
-45
1.03
0.08
0.58
0.26
0.47
2.25
—
—
—
—
—
—
—
—
—
—
—
—
ispXPLD 5000MX Family Data Sheet
-0.10
0.35
2.50
1.33
0.00
0.53
0.34
1.01
0.00
0.00
0.00
0.00
—
—
—
—
—
—
-5
0.68
0.08
0.65
0.29
0.53
2.51
—
—
—
—
—
—
—
—
—
—
—
—
-0.10
0.55
2.40
1.33
0.00
0.12
0.34
1.41
0.00
0.00
0.00
0.00
—
—
—
—
—
—
-52
0.93
0.08
0.65
0.29
0.55
2.61
—
—
—
—
—
—
—
—
—
—
—
—
-0.07
-0.03
0.52
4.00
2.00
0.00
0.08
0.22
2.91
0.00
0.00
0.34
—
—
—
—
—
—
-75
1.50
0.13
0.97
0.43
0.79
3.76
—
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns