LC5512MB-75F256I Lattice, LC5512MB-75F256I Datasheet - Page 44

• Manufacturer Part Number: LC5512MB-75F256I
• Description: LATLC5512MB-75F256I 512MC CPLD 150K Gate
• Manufacturer: Lattice

Lattice Semiconductor
ispXP sysCONFIG Port Timing Specifications
sysCONFIG Write Cycle Timing
t
t
t
t
t
t
t
t
t
t
f
sysCONFIG Read Cycle Timing
t
t
t
t
f
t
SUCS
HCS
SUWD
HWD
PRGM
DINIT
IODISS
IOENSS
WH
WL
MAXW
HREAD
SUREAD
RH
RL
MAXR
CORD
Symbol
Input setup time of CS to CCLK rise
Hold time of CS to CCLK rise
Input setup time of write data to CCLK rise
Hold time of write data to CCLK rise
Low time to reset device SRAM
INIT delay time
User I/O disable
User I/O enable
Write clock High pulse width
Write clock Low pulse width
Write f
Hold time of READ to CCLK rise
Input setup time of READ High to CCLK rise
READ clock high pulse width
READ clock low pulse width
Read f
Clock to out for read data
MAX
MAX
Timing Parameter
44
ispXPLD 5000MX Family Data Sheet
Min.
10
10
18
18
15
18
18
—
—
—
—
—
—
1
0
5
1
Max.
50
27
27
25
—
—
—
—
—
—
—
—
—
—
—
—
5
Units
MHz
MHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns