MC68EC060RC66 Freescale Semiconductor, MC68EC060RC66 Datasheet - Page 252

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MC68EC060RC66

Manufacturer Part Number
MC68EC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68EC060RC66

Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
206
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Exception Processing
8.4.2 Six-Word Stack Frame (Format $2)
If a six-word stack frame is on the stack and an RTE instruction is encountered, the proces-
sor restores the SR and PC values from the stack, increments the SSP by $C, and resumes
normal instruction execution.
8.4.3 Floating-Point Post-Instruction Stack Frame (Format $3)
In this case, the processor restores the SR and PC values from the stack and increments
the supervisor stack pointer by $C. If another floating-point post-instruction exception is
pending, exception processing begins immediately for the new exception; otherwise, the
processor resumes normal instruction execution.
8-20
SP
SP
+$02
+$06
+$08
+$02
+$06
+$08
15
15
0 0 1 0
0 0 1 1
FLOATING-POINT POST-INSTRUCTION
SIX-WORD STACK FRAME–FORMAT $2
Stack Frames
Stack Frames
STACK FRAME–FORMAT $3
PROGRAM COUNTER
PROGRAM COUNTER
EFFECTIVE ADDRESS
STATUS REGISTER
STATUS REGISTER
ADDRESS
VECTOR OFFSET
VECTOR OFFSET
M68060 USER’S MANUAL
0
0
• CHK, CHK2 (Emulated),
• Unimplemented Floating-
• Address Error
• Floating-Point Post-Instruction • Next Instruction; Effective
TRAPcc, FTRAPcc(Emulat-
ed), TRAPV, Trace, or Zero Di-
vide
Point Instruction
Exception Types
Exception Types
• Next Instruction; Address field
• Next Instruction; Address field
• Instruction that caused the ad-
Address field is the calculated
effective address for the float-
ing-point instruction.
has the address of the instruc-
tion that caused the excep-
tion.
has the calculated <ea> for
the floating-point instruction.
dress error; Address field has
the branch target address with
A0=0.
Effective Address Field
Stacked PC Points To;
Stacked PC Points To;
Address Field Has
MOTOROLA

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