DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 47

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

6.0 Port Block Functions
connecting the resistor to GND will decrease V
degree of change is related to the resistor value.
The REQ input can be used to adjust the shape of the
waveform for all outputs. By placing a resistor between
REQ and V
form will be increased. Conversely, connecting the resistor
to GND will decrease the amplitude. As with RTX, the
degree of change here is related to the resistor value.
Early Link Pulses
IEEE 802.3 specification, section 14.3.1.2.3 and 14.3.1.2.1
can be interpreted as requiring a period of silence between
repeated packets ranging from 8 to 24 mS. The RIC2A
may, however, send an early link pulse as soon as 200nS
after successfully transmitting a packet. This may be con-
sidered an IEEE compliance issue, but National Semicon-
ductor views early link pulses as having no impact on
system performance. Again, the RIC2A has undergone
extensive endurance testing sessions and has not shown
any loss of data.
6.2 Segment Partition
The RIC2A's ports have dedicated partition state machines
to perform all functions defined by the IEEE algorithm.
Refer to the "Partitioning State Diagram for Port X", Figure
9-6 in the lEEE 802.3 Repeater Specifications. Several
device configuration options are available to customize this
algorithm for various applications during power up (the
Mode Load cycle).
The RIC2A provides five different options:
1. Operation of the 13 partition state machines may be dis-
2. The value of consecutive collision counts required to par-
3. The use of the TW5 specification in the partition algo-
4. The operation of the ports' state machines reconnecting
abled via the disable partition DPART configuration bit
(pin D6).
tition a segment (the CCLimit specification) may be set
at either 31 or 63 consecutive collisions.
rithm differentiates between collisions that occur early in
a packet (before TW5 has elapsed) and those that occur
late in the packet (after TW5 has elapsed). These late or
"out of window" collisions can be regarded in the same
manner as early collisions if the Out of Window Collision
Enable OWCE option is selected. This configuration bit
is applied to the D4 pin during the Mode Load operation.
of a segment may also be modified by the user. The
Transmit Only (/TXONLY) configuration bit allows the
designer to prevent segment reconnection unless the re-
DD
, the amplitude of the pre-emphasis wave-
RJ45
TRANSFORMER
1:1
Figure 20. Sample Twisted Pair Receive Filter
(Continued)
560 nH
560 nH
OD
. The
22 pF
47
5. The RIC2A may be configured to use an additional crite-
6.3 Port Status Register Functions
All RIC2A ports have their own port status registers. Addi-
tionally, these registers provide pertinent status information
concerning the port and the network segment such as the
following operations:
1. Port Disable
2. Link Disable
3. Partition Reconnection
4. Selection between normal and reduced squelch levels
Note that the link disable and port disable options are
mutually exclusive functions. For example, disabling link
does not affect receiving and transmitting from/to that port
and disabling a port does not disable link.
When a port is disabled, packet transmission and reception
between the port's segment and the rest of the network is
prevented.
connecting packet is sourced by the repeater. For this
case, the repeater transmits on to the segment rather
than the segment transmitting when the repeater is idle.
The normal reconnection mode does not differentiate be-
tween such packets. The /TXONLY configuration bit is
input on pin D5 during the Mode Load cycle.
rion for segment partition. This is referred to as loopback
partition. If this operation is selected, the partition state
machine monitors the receive and collision inputs from a
network segment to discover if they are active when the
port is transmitting. This determines if the network trans-
ceiver is looping back the data pattern from the cable. A
port may be partitioned if no data or collision signals are
seen by the partition logic in the following window: 61 to
96 network bit times after the start of transmission. See
datasheet Section 7.0 for details. A segment partitioned
by this operation may be reconnected in the normal man-
ner.
12
12
100 pF
RX+
120
RX-
RX+
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