DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 66

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

7.0 RIC2A Registers
Lower Event Information Register (Lower EIR) (Page 1H Address 1FH)
Port Event Count Register (Pages 2H and 3H)
The Event Count Register (ECR) shows the instantaneous value of the specified port's 16 bit counter. The counter incre-
ments when an enabled event occurs. The counter may be cleared when it is read, and prevented from rolling over when
the maximum count is reached, by setting the appropriate control bits in the Upper Event Count mask register. Since the
RIC2A's processor port is octal and the counters are 16 bits long, a temporary holding register is employed for register
reads. When one of the counters is read, either high or low byte first, all 16 bits of the counter are transferred to a holding
register. Provided the next read cycle to the counter array accesses the same counter's other byte, then the read cycle
accesses the holding register. This avoids the problem of events occurring in between the two processor reads and indi-
cating a false count value. In order to enter a new value to the holding register a different counter must be accessed, or
the same counter byte must be re-read.
D0
D1
D2
D3
D4
D5
D6
D7
Upper Byte
Lower Byte
Bit
R
R
R
R
R
R
R
R/W
R/W
EC15
EC7
DLU
D7
D7
D7
ER9
ER10
ER11
ER12
ER13
resv
resv
DLU
Symbol
EC14
EC6
(Continued)
resv
D6
D6
D6
EC13
0: Flag found not generated by event on port 9
1: Flag found generated by event on port 9
0: Flag found not generated by event on port 10
1: Flag found generated by event on port 10
0: Flag found not generated by event on port 11
1: Flag found generated by event on port 11
0: Flag found not generated by event on port 12
1: Flag found generated by event on port 12
0: Flag found not generated by event on port 13
1: Flag found generated by event on port 13
Reserved for Future Use
reads as a logic 0
Reserved for Future Use
reads as a logic 0
Disable the LED Updates: This bit disables the LED display updates for a
faster processor register access
0: Re-enable the LED update cycle.(Note)
1: Disable the LED update cycles
Note: The LED update cycle will be re-enabled only when the network and the RIC2A internal state ma-
chines are idle
EC5
resv
D5
D5
D5
EC12
ER13
EC4
D4
D4
D4
66
EC11
ER12
EC3
D3
D3
D3
Description
EC10
EC2
ER11
D2
D2
D2
EC1
EC9
ER10
D1
D1
D1
EC0
EC8
ER9
D0
D0
D0
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