PIC16F819-I/SO Microchip Technology Inc., PIC16F819-I/SO Datasheet - Page 86

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PIC16F819-I/SO

Manufacturer Part Number
PIC16F819-I/SO
Description
18 PIN, 3.5 KB FLASH, 256 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F819-I/SO

A/d Inputs
5-Channel, 10-Bit
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F818/819
11.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 11-2. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 11-2. The maximum recommended imped-
ance for analog sources is 2.5 k . As the impedance
is decreased, the acquisition time may be decreased.
EQUATION 11-1:
FIGURE 11-2:
DS39598D-page 84
T
T
T
ACQ
C
ACQ
Note 1: The reference voltage (V
2: The charge holding capacitor (C
3: The maximum recommended impedance for analog sources is 10 k . This is required to meet the pin
4: After a conversion has completed, a 2.0 T
A/D Acquisition Requirements
=
=
=
=
=
=
=
=
leakage specification.
During this time, the holding capacitor is not connected to the selected A/D input channel.
Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
T
2 s + T
C
-120 pF (1 k + 7 k + 10 k ) In(0.0004885)
16.47 s
2 s + 16.47 s + [(50°C – 25 C)(0.05 s/ C)
19.72 s
AMP
S
HOLD
Legend: C
) and the internal sampling switch (R
HOLD
+ T
(R
C
C
VA
+ [(Temperature – 25°C)(0.05 s/°C)]
IC
. The sampling switch (R
ACQUISITION TIME
ANALOG INPUT MODEL
+ T
V
I
R
SS
C
R
LEAKAGE
+ R
PIN
T
IC
HOLD
S
COFF
SS
ANx
+ R
C
5 pF
HOLD
PIN
S
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
) In(1/2047)
various junctions
) must be allowed
REF
) has no effect on the equation since it cancels itself out.
HOLD
V
DD
DD
), see
V
V
) is not discharged after each conversion.
T
T
SS
SS
= 0.6V
= 0.6V
)
)
AD
delay must complete before acquisition can begin again.
I
± 500 nA
LEAKAGE
After the analog input channel is selected (changed),
this acquisition must be done before the conversion
can be started.
To
Equation 11-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, T
the “PICmicro
Manual” (DS33023).
R
IC
calculate
1K
V
Sampling
SS R
DD
Switch
6V
5V
4V
3V
2V
®
SS
Mid-Range MCU Family Reference
the
Sampling Switch
5 6 7 8 9 10 11
V
minimum
SS
 2003 Microchip Technology Inc.
C
= DAC Capacitance
= 120 pF
(k )
HOLD
acquisition
ACQ
, see
time,

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