PIC16F819-I/SO Microchip Technology Inc., PIC16F819-I/SO Datasheet - Page 94

• Manufacturer Part Number: PIC16F819-I/SO
• Description: 18 PIN, 3.5 KB FLASH, 256 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F819-I/SO

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F818/819
12.3
PIC16F818/819 device has a noise filter in the MCLR
Reset path. The filter will detect and ignore small
pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
The behavior of the ESD protection on the MCLR pin
has been altered from previous devices of this family.
Voltages applied to the pin that exceed its specification
can result in both MCLR and excessive current beyond
the device specification during the ESD event. For this
reason, Microchip recommends that the MCLR pin no
longer be tied directly to V
RC network, as shown in Figure 12-2, is suggested.
The RA5/MCLR/V
(default) or as an I/O pin (RA5). This is configured
through the MCLRE bit in the Configuration Word
register.
FIGURE 12-2:
12.4
A Power-on Reset pulse is generated on-chip when
V
advantage of the POR, tie the MCLR pin to V
described in Section 12.3 “MCLR”. A maximum rise
time for V
Characteristics” for details.
When the device starts normal operation (exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in Reset until the operating conditions are
met. For more information, see Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
DS39598E-page 92
DD
V
rise is detected (in the range of 1.2V-1.7V). To take
DD
R1
1 k
C1
0.1 F
(optional, not critical)
MCLR
Power-on Reset (POR)
DD
(or greater)
is specified. See Section 15.0 “Electrical
PP
pin can be configured for MCLR
RECOMMENDED MCLR
CIRCUIT
DD
MCLR
. The use of an
PIC16F818/819
DD
as
12.5
The Power-up Timer (PWRT) of the PIC16F818/819 is
a counter that uses the INTRC oscillator as the clock
input. This yields a count of 72 ms. While the PWRT is
counting, the device is held in Reset.
The power-up time delay depends on the INTRC and
will vary from chip-to-chip due to temperature and
process variation. See DC parameter #33 for details.
The PWRT is enabled by clearing configuration bit,
PWRTEN.
12.6
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycles (from OSC1 input) delay after the
PWRT delay is over (if enabled). This helps to ensure
that the crystal oscillator or resonator has started and
stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
Sleep.
12.7
The configuration bit, BOREN, can enable or disable
the Brown-out Reset circuit. If V
(parameter #D005, about 4V) for longer than T
(parameter #35, about 100 s), the brown-out situation
will reset the device. If V
than T
Once the brown-out occurs, the device will remain in
Brown-out Reset until V
Power-up Timer (if enabled) will keep the device in
Reset for T
should fall below V
Reset process will restart when V
with the Power-up Timer Reset. Unlike previous PIC16
devices, the PWRT is no longer automatically enabled
when the Brown-out Reset circuit is enabled. The
PWRTEN
independent of each other.
12.8
On power-up, the time-out sequence is as follows: the
PWRT delay starts (if enabled) when a POR occurs.
Then, OST starts counting 1024 oscillator cycles when
PWRT ends (LP, XT, HS). When the OST ends, the
device comes out of Reset.
If MCLR is kept low long enough, all delays will expire.
Bringing MCLR high will begin execution immediately.
This is useful for testing purposes or to synchronize
more than one PIC16F818/819 device operating in
parallel.
Table 12-3 shows the Reset conditions for the Status,
PCON and PC registers, while Table 12-4 shows the
Reset conditions for all the registers.
BOR
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
Brown-out Reset (BOR)
Time-out Sequence
, a Reset may not occur.
PWRT
and
(parameter #33, about 72 ms). If V
BOREN
BOR
 2004 Microchip Technology Inc.
during T
DD
DD
falls below V
configuration
rises above V
PWRT
DD
DD
rises above V
falls below V
, the Brown-out
BOR
BOR
bits
for less
. The
BOR
BOR
BOR
are
DD