PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 134

• Manufacturer Part Number: PIC18F45J10-I/ML
• Description: 44 PIN, 32 KB FLASH, 1024 RAM
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45J10-I/ML

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 32
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 2-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F45J10 FAMILY
In addition to the expanded range of modes available
through the CCP1CON register and ECCP1AS
register, the ECCP module has an additional register
associated with Enhanced PWM operation and
auto-shutdown features. It is:
• ECCP1DEL (Dead-Band Delay)
14.1
The Enhanced CCP module may have up to four PWM
outputs, depending on the selected operating mode.
These outputs, designated P1A through P1D, are
multiplexed with I/O pins on PORTC and PORTD. The
outputs that are active depend on the ECCP operating
mode selected. The pin assignments are summarized
in Table 14-1.
To configure the I/O pins as PWM outputs, the proper
PWM mode must be selected by setting the
P1M1:P1M0
appropriate TRISC and TRISD direction bits for the port
pins must also be set as outputs.
14.1.1
Like the standard CCP modules, the ECCP module can
utilize Timers 1 or 2, depending on the mode selected.
Timer1 is available for modules in Capture or Compare
modes, while Timer2 is available for modules in PWM
mode.
Enhanced CCP modules are identical to those
described for standard CCP modules. Additional
details
Section 13.1.1
Resources”.
TABLE 14-1:
DS39682B-page 132
Compatible CCP
Dual PWM
Quad PWM
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP1 in a given mode.
ECCP Mode
Interactions
ECCP Outputs and Configuration
on
ECCP MODULES AND TIMER
RESOURCES
timer
and
PIN ASSIGNMENTS FOR VARIOUS ECCP1 MODES
“CCP
CCP1M3:CCP1M0
resources
between
Configuration
Modules
00xx 11xx
10xx 11xx
x1xx 11xx
CCP1CON
the
are
standard
and
provided
bits.
All 40/44-pin Devices:
Timer
The
and
Preliminary
in
CCP1
RC2
P1A
P1A
14.2
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP module are identical in operation to that of
CCP2. These are discussed in detail in Section 13.2
“Capture
Mode”. No changes are required when moving
between 28-pin and 40/44-pin devices.
14.2.1
The Special Event Trigger output of ECCP1 resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
14.3
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 13.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode, as in Table 14-1.
Note:
RD5/PSP5
RD5
P1B
P1B
Capture and Compare Modes
Standard PWM Mode
SPECIAL EVENT TRIGGER
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 13.4.4
“Setup
Section 14.4.9 “Setup for PWM Opera-
tion”. The latter is more generic and will
work for either single or multi-output PWM.
Mode”
and
for
RD6/PSP6
RD6/PSP6
© 2006 Microchip Technology Inc.
RD6
P1C
Section 13.3
PWM
Operation”
RD7/PSP7
RD7/PSP7
“Compare
RD7
P1D
or