PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 328

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PIC18F45J10-I/ML

Manufacturer Part Number
PIC18F45J10-I/ML
Description
44 PIN, 32 KB FLASH, 1024 RAM
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45J10-I/ML

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
0 Bytes
Input Output
32
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
32K Bytes
Ram Size
1K Bytes
Speed
40 MHz
Timers
1-8 bit, 2-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC18F45J10 FAMILY
TABLE 23-24: A/D CONVERTER CHARACTERISTICS: PIC18F24J10/25J10/44J10/45J10 (INDUSTRIAL)
FIGURE 23-20:
DS39682B-page 326
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
Note 1:
A/D DATA
SAMPLE
2:
3:
A/D CLK
ADRES
Symbol
N
E
E
E
E
ΔV
V
V
V
Z
I
BSF ADCON0, GO
REF
AIN
AIN
ADIF
IL
DL
OFF
GN
REFH
REFL
R
GO
2:
REF
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
V
V
Maximum allowed impedance is 8.8 kΩ. This requires higher acquisition time than described in the A/D
chapter.
Q4
REFH
REFL
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
current is from RA2/AN2/V
132
current is from RA3/AN3/V
REF
REFH
A/D CONVERSION TIMING
Input Current
– V
Characteristic
REFL
(Note 2)
)
9
(2)
8
REF
REF
OLD_DATA
- pin or V
7
+ pin or V
Preliminary
V
SS
. . .
SAMPLING STOPPED
V
V
Min
1.8
REFL
CY
– 0.3V
3
SS
SS
DD
is added before the A/D clock starts.
, whichever is selected as the V
, whichever is selected as the V
. . .
130
131
Guaranteed
Typ
2
(1)
V
1
DD
V
V
Max
<±1
<±1
<±3
<±3
150
REFH
REFH
2.2
10
– 3.0V
5
0
© 2006 Microchip Technology Inc.
Units
LSb ΔV
LSb ΔV
LSb ΔV
LSb ΔV
μA
μA
bit
V
V
V
V
V
REFL
REFH
ΔV
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
SS
DD
DD
source.
REF
REF
REF
REF
REF
source.
< 3.0V
≥ 3.0V
Conditions
T
V
CY
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
AIN
AIN
acquisition.
V
REF

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