PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 139

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PIC18F45J10-I/ML

Manufacturer Part Number
PIC18F45J10-I/ML
Description
44 PIN, 32 KB FLASH, 1024 RAM
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45J10-I/ML

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
0 Bytes
Input Output
32
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
32K Bytes
Ram Size
1K Bytes
Speed
40 MHz
Timers
1-8 bit, 2-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
14.4.5
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 14-6.
FIGURE 14-6:
© 2006 Microchip Technology Inc.
Forward Mode
Reverse Mode
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
P1A
P1B
P1C
P1D
P1A
P1B
P1C
P1D
FULL-BRIDGE MODE
2: Output signal is shown as active-high.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
FULL-BRIDGE PWM OUTPUT
(1)
(1)
Duty Cycle
Duty Cycle
Preliminary
Period
Period
PIC18F45J10 FAMILY
P1A, P1B, P1C and P1D outputs are multiplexed with
the PORTC<2> and PORTD<7:5> data latches. The
TRISC<2> and TRISD<7:5> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
(1)
(1)
DS39682B-page 137

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