PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 222

• Manufacturer Part Number: PIC18F45J10-I/ML
• Description: 44 PIN, 32 KB FLASH, 1024 RAM
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45J10-I/ML

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 32
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 2-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F45J10 FAMILY
18.1
There are eight modes of operation for the compara-
tors, shown in Figure 18-1. Bits CM2:CM0 of the
CMCON register are used to select these modes. The
TRISA register controls the data direction of the com-
parator pins for each mode. If the Comparator mode is
FIGURE 18-1:
DS39682B-page 220
Comparators Reset
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
A = Analog Input, port reads zeros always
* Setting the TRISA<5> bit will disable the comparator outputs by configuring the pins as inputs.
RB5/KBI1/T0CKI/C1OUT*
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
+
-/CV
+
-/CV
+
-/CV
+
-/CV
Comparator Configuration
REF
REF
REF
REF
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
/
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Preliminary
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off (POR Default Value)
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RB5/KBI1/
T0CKI/C1OUT*
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS1/C2OUT*
RA0/AN0
RA3/AN3/
V
RB5/KBI1/
T0CKI/C1OUT*
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS1/C2OUT*
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
changed, the comparator output level may not be valid
for the specified mode change delay shown in
Section 23.0 “Electrical Characteristics”.
Note:
CIS (CMCON<3>) is the Comparator Input Switch
+
-/CV
+
-/CV
+
-/CV
+
-/CV
REF
REF
REF
REF
/
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
© 2006 Microchip Technology Inc.
C1
C2
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
C1OUT
C2OUT
From V
REF
C1OUT
C2OUT
Module