PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 194

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PIC18F45J10-I/ML

Manufacturer Part Number
PIC18F45J10-I/ML
Description
44 PIN, 32 KB FLASH, 1024 RAM
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45J10-I/ML

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
0 Bytes
Input Output
32
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
32K Bytes
Ram Size
1K Bytes
Speed
40 MHz
Timers
1-8 bit, 2-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC18F45J10 FAMILY
EXAMPLE 16-1:
TABLE 16-2:
DS39682B-page 192
TXSTA
RCSTA
BAUDCON ABDOVF
SPBRGH
SPBRG
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
For a device with F
Desired Baud Rate
Solving for SPBRGH:SPBRG:
Calculated Baud Rate
Error
Name
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
X
OSC
CALCULATING BAUD RATE ERROR
of 16 MHz, desired baud rate of 9600, Asynchronous mode, 8-bit BRG:
= F
= ((F
= ((16000000/9600)/64) – 1
= [25.042] = 25
= 16000000/(64 (25 + 1))
= 9615
= (Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate
= (9615 – 9600)/9600 = 0.16%
RCIDL
Bit 6
TX9
RX9
OSC
OSC
/(64 ([SPBRGH:SPBRG] + 1))
/Desired Baud Rate)/64) – 1
SREN
TXEN
Bit 5
SYNC
CREN
SCKP
Bit 4
Preliminary
SENDB
ADDEN
BRG16
Bit 3
BRGH
FERR
Bit 2
OERR
TRMT
WUE
Bit 1
© 2006 Microchip Technology Inc.
ABDEN
RX9D
TX9D
Bit 0
Reset Values
on page
45
45
45
45
45

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