SAF1761BE/V1,557 NXP Semiconductors, SAF1761BE/V1,557 Datasheet - Page 12

• Manufacturer Part Number: SAF1761BE/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAF1761BE/V1,557

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 2.
SAF1761_1
Product data sheet
Symbol
WR_N
GNDD
BAT_ON_N
DC_IRQ
HC_IRQ
DC_DREQ
HC_DREQ
V
HC_DACK
DC_DACK
REG1V8
HC_SUSPEND
/WAKEUP_N
DC_SUSPEND
/WAKEUP_N
GNDC
RESET_N
GNDA
CC(I/O)
[1][2]
Pin description
Pin
LQFP128
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
…continued
Type
I
G
OD
O
O
O
O
P
I
I
P
I/OD
I/OD
G
I
G
[3]
Description
write enable; active LOW
input, 3.3 V tolerant
digital ground
to indicate the presence of a minimum 3.3 V on pins 6 and 7 (open-drain); connect
to V
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
peripheral controller interrupt signal
output 4 mA drive, 3.3 V tolerant
host controller interrupt signal
output 4 mA drive, 3.3 V tolerant
DMA controller request for the peripheral controller
output pad 4 mA drive, 3.3 V tolerant
DMA controller request for the host controller
output pad 4 mA drive, 3.3 V tolerant
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling capacitor; see
Section 7.8
host controller DMA request acknowledgment; when not in use, connect to V
through a 10 k pull-up resistor
input, 3.3 V tolerant
peripheral controller DMA request acknowledgment; when not in use, connect to
V
input, 3.3 V tolerant
core power output (1.8 V); internal 1.8 V for the digital core; used for decoupling;
connect a 100 nF capacitor; for details on additional capacitor placement, see
Section 7.8
host controller suspend and wake-up; 3-state suspend output (active LOW) and
wake-up input circuits are connected together
connect to V
output pad, open-drain, 4 mA output drive, 3.3 V tolerant
peripheral controller suspend and wake-up; 3-state suspend output (active LOW)
and wake-up input circuits are connected together
connect to V
output pad, open-drain, 4 mA output drive, 3.3 V tolerant
core ground
external power-up reset; active LOW; when reset is asserted, it is expected that bus
signals are idle, that is, not toggling
input, 3.3 V tolerant
Remark: During reset, ensure that all the input pins to the SAF1761 are not
toggling and are in their inactive states.
analog ground
CC(I/O)
•
•
•
•
CC(I/O)
HIGH = output is 3-state; SAF1761 is in suspend mode
LOW = output is LOW; SAF1761 is not in suspend mode
HIGH = output is 3-state; the SAF1761 is in suspend mode
LOW = output is LOW; the SAF1761 is not in suspend mode
through a 10 k pull-up resistor
Rev. 01 — 18 November 2009
through a 10 k pull-up resistor
CC(I/O)
CC(I/O)
through an external 10 k pull-up resistor
through an external 10 k pull-up resistor
Hi-Speed USB OTG controller
SAF1761
© NXP B.V. 2009. All rights reserved.
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CC(I/O)