PEF24901HV22XP Lantiq, PEF24901HV22XP Datasheet - Page 28

PEF24901HV22XP

Manufacturer Part Number
PEF24901HV22XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF24901HV22XP

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Table 1
Pin No.
34,
40,
46,
51
28,
27
26,
24
23,
21
19,
18
Test Pins
29
20
Data Sheet
Pin Definitions and Functions (cont’d)
Symbol
D3A
D3B
D3C
D3D
ST00
ST01
ST10
ST11
ST20
ST21
ST30
ST31
CLS0
CLS1
Input (I)
Output (O)
O
I
I
I
I
O
O
Function
Relay Driver Pins of Line Port 3
addressable via MON-8 command in IOM
channel 3/7/11/15. The logic values of the bit
positions A,B,C, D of the MON-8 command
’SETD’ determine the output setting.
Default value after pin-reset is low. C/I-code
reset does not affect the current status.
Status Pin of Line Port 0
change of status is passed to IOM
0/4/8/12 via the MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Status Pin of Line Port 1
change of status is passed to IOM
1/5/9/13 via the MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Status Pin of Line Port 2
change of status is passed to IOM
2/6/10/14 via the MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Status Pin of Line Port3
change of status is passed to IOM
3/7/11/15 via the MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Clock of 1 ms period to indicate the received
frame of Port 0
can be used for monitoring and test purposes
Clock of 1 ms period to indicate the received
frame of Port 1
can be used for monitoring and test purposes
29
0,
0,
0,
0,
S
S
S
S
1
1
1
1
.
.
.
.
Pin Descriptions
®
®
®
®
PEF 24901
-2 channel
-2 channel
-2 channel
-2 channel
2002-09-30
DFE-T
®
-2

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