PEF24901HV22XP Lantiq, PEF24901HV22XP Datasheet - Page 83

• Manufacturer Part Number: PEF24901HV22XP
• Manufacturer: Lantiq

Specifications of PEF24901HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

4.4.5
The DFE-T V2.2 provides a boundary scan support for a cost effective board testing. It
consists of:
• Boundary scan according to IEEE 1149.1 specification
• Test Access Port controller (TAP)
• Five dedicated pins (TCK, TMS, TDI, TDO, TRST)
• Pins TRST, TDI and TMS are provided with an internal pullup resistor
• One 32-bit IDCODE register
• Pin TRST tied to low resets the Boundary Scan TAP Controller
• Instructions CLAMP and HIGHZ were added, instruction SSP was removed in V2.2
Boundary Scan
All pins except the power supply pins, the "Not Connected" pins and the pins TDI, TDO,
TCK, TMS, and TRST are included in the boundary scan chain. Depending on the pin
functionality one, two or three boundary scan cells are provided.
Note: Pin 16 (former MTO) and pin 49 (former TP3) are included in the Boundary Scan
Table 17
Pin Type
Input
Output
I/O
When the TAP controller is in the appropriate mode data is shifted into or out of the
boundary scan via the pins TDI/TDO using the 6.25 MHz clock on pin TCK.
The pins are included in the following sequence in the boundary scan chain:
•
Boundary Scan
Number
TDI ––>
Data Sheet
1.
2.
3.
4.
(recommended setting for normal operation if the Boundary Scan logic is not used)
despite they are N.C. (not connected) in the pin list.
Boundary Scan
Boundary Scan Cells.
Pin Number
62
61
60
56
Number of Boundary
Scan Cells
1
2
3
Pin Name
DT
CLS3
RES
SSP
1)
84
Type
I
I/O
I
I
Usage
input
output, enable
input, output, enable
Operational Description
Number of
Scan Cells
1
3
1
1
PEF 24901
2002-09-30
DFE-T