PEF24901HV22XP Lantiq, PEF24901HV22XP Datasheet - Page 31

PEF24901HV22XP

Manufacturer Part Number
PEF24901HV22XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF24901HV22XP

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
3
3.1
A functional overview of the DFE-T V2.2 is given in
processing and frame formatting blocks the PEF 24901 features an on-chip activation/
deactivation controller and programmable general purpose I/O pins for the control of test
relays and power feeding circuits. An application specific DSP core services all four lines
and cuts chip size to a minimum.
Figure 7
Data Sheet
4x U
Functional Description
Functional Overview
AFE
LIU
Level Detection
Bias, Refer.
for Wake Up
Bandgap,
Block Diagram and Data Flow Diagram (DFE-T V2.2 + AFE V2.1)
ADC
DAC
DFE-T V2.2
PDM
Filter
DSP
Clock Generation
Clocks
Canceller
Recovery
Echo
Timing
+
A
G
C
Equalizer
32
U Protocol Processing Unit
M
U
X
M
U
X
Mode Setting
SyncWord
Encoder
Decoder
Mode Pins
4B3T
4B3T
Activation/Deactivation
Figure
Scrambler
Scrambler
Controller
De-
Functional Description
7. Besides the signal
Framing
Framing
Framing
U De-
U
I/O Control
General
Purpose I/Os
dataflow
System
Interface
Unit
SIU
PEF 24901
2002-09-30
IOM
DFE-T
®
-2

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