PEB2096HV31XT Lantiq, PEB2096HV31XT Datasheet - Page 10

PEB2096HV31XT

Manufacturer Part Number
PEB2096HV31XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB2096HV31XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Data Sheet
1.4
Pin No.
6, 12, 22, 28,
34, 44
3, 9, 19,
25, 31, 37
33, 32
30, 29
27, 26
24, 23
1, 2
4, 5
7, 8
10, 11
43
42
41
40
39
16
15
14
13
20
21
36
35
38
Pin Definitions and Functions
Symbol Input (I)
V
V
LI0a,b
LI1a,b
LI2a,b
LI3a,b
LI4a,b
LI5a,b
LI6a,b
LI7a,b
FSC
DCL
DD
DU
IDS
TMS
TCK
TDI
TDO
XTAL1
XTAL2
CLK1
CLK2
RST
DD
SS
Output (O)
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
O
I
I
I
I
O
I
O
O
O
I
Function
+ 5 V power supply
Reference ground
U
No. 0: differential input / output
No. 1: differential input / output
No. 2: differential input / output
No. 3: differential input / output
No. 4: differential input / output
No. 5: differential input / output
No. 6: differential input / output
No. 7: differential input / output
IOM
Frame Synchronization Clock: 8 kHz
Data Clock
Data Downstream (data input)
Data Upstream (data output)
Interface Data rate Select (static pin-strapped):
0: double DCL (normal IOM interface)
1: single DCL
JTAG Boundary Scan Interface
Test Mode Select, internal pull-up resistor
Test Clock
Test Data Input, internal pull-up resistor
Test Data Output
Oscillator or 15.36 MHz clock input
Oscillator output
Clock output 15.36 MHz
(i.e. to drive other OCTAT-P)
Clock output 7.68 MHz
(i.e. to drive ISAC-S or QUAT-S)
Reset, active high
PN
1-6
®
Line Interfaces a,b
-2 Interface
PEB 2096
Overview
04.99

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