PI7C8150BMAIE Pericom Semiconductor, PI7C8150BMAIE Datasheet - Page 67

• Manufacturer Part Number: PI7C8150BMAIE
• Description: IC PCI-PCI BRIDGE ASYNC 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150BMAIE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9
9.1
9.2
9.3
If the internal secondary bus arbiter is enabled, the secondary bus is always parked at the
last master that used the PCI bus. That is, PI7C8150B keeps the secondary bus grant
asserted to a particular master until a new secondary bus request comes along. After reset,
PI7C8150B parks the secondary bus at itself until transactions start occurring on the
secondary bus. Offset 48h, bit 1, can be set to 1 to park the secondary bus at PI7C8150B.
By default, offset 48h, bit 1, is set to 0. If the internal arbiter is disabled, PI7C8150B parks
the secondary bus only when the reconfigured grant signal, S_REQ_L[0], is asserted and
the secondary bus is idle.
This chapter provides information about the clocks.
PRIMARY CLOCK INPUTS
PI7C8150B implements a primary clock input for the PCI interface. The primary interface
is synchronized to the primary clock input, P_CLK, and the secondary interface is
synchronized to the secondary clock. In synchronous mode, the secondary clock is derived
internally from the primary clock, P_CLK. PI7C8150B operates at a maximum frequency
of 66 MHz (33MHz for PI7C8150B-33).
SECONDARY CLOCK OUTPUTS
PI7C8150B has 10 secondary clock outputs, S_CLKOUT[9:0] that can be used as clock
inputs for up to nine external secondary bus devices. In synchronous mode, the
S_CLKOUT[9:0] outputs are derived from P_CLK. The secondary clock edges are delayed
from P_CLK edges by a minimum of 0ns. This is the rule for using secondary clocks:
Each secondary clock output is limited to no more than one load.
ASYNCHRONOUS MODE
In asynchronous mode, the PI7C8150B can be run in the following frequency
configuration:
PI7C8150B-33 can be run in the following frequency configuration:
CLOCKS
25MHz to 66MHz
25MHz to 33MHz
Primary (MHz)
Primary (MHz)
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ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
Secondary (MHz)
Secondary (MHz)
25MHz to 66MHz
25MHz to 33MHz
ADVANCE INFORMATION
April 2009 – Revision 1.08
PI7C8150B