CY7C09189V-12AC Cypress Semiconductor Corp, CY7C09189V-12AC Datasheet

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CY7C09189V-12AC

Manufacturer Part Number
CY7C09189V-12AC
Description
SRAM Chip Sync Dual 3.3V 576K-Bit 64K x 9-Bit 25ns/12ns 100-Pin TQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C09189V-12AC

Package
100TQFP
Timing Type
Synchronous
Density
576 Kb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Address Bus Width
16 Bit
Number Of I/o Lines
9 Bit
Number Of Ports
2
Number Of Words
64K

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C09189V-12AC
Manufacturer:
CYPRESS
Quantity:
325
Cypress Semiconductor Corporation
Document #: 38-06043 Rev. *B
Features
Notes:
CY7C09079V/89V/99V
CY7C09179V/89V/99V
1. See page 6 for Load Conditions.
2. I/O
3. A
• True Dual-Ported memory cells which allow simulta-
• 6 Flow-Through/Pipelined devices
• 3 Modes
• Pipelined output mode on both ports allows fast
• 0.35-micron CMOS for optimum speed/power
Logic Block Diagram
R/W
OE
CE
CE
FT/Pipe
I/O
A
CLK
ADS
CNTEN
CNTRST
neous access of the same memory location
— 32K x 8/9 organizations (CY7C09079V/179V)
— 64K x 8/9 organizations (CY7C09089V/189V)
— 128K x 8/9 organizations (CY7C09099V/199V)
— Flow-Through
— Pipelined
— Burst
100-MHz operation
0
0
–A
–A
0
0L
L
0L
1L
–I/O
L
L
L
14
–I/O
[3]
14/15/16L
for 32K, A
7
L
L
for x8 devices, I/O
[2]
L
7/8L
0
–A
15/16/17
15
for 64K, and A
0
–I/O
8/9
0/1
8
0/1
1
0
1
Counter/
Register
Address
for x9 devices.
Decode
0
–A
16
0
for 128K devices.
3901 North First Street
Control
I/O
True Dual-Ported
RAM Array
Synchronous Dual-Port Static RAM
• High-speed clock to data access 6.5
• 3.3V low operating power
• Fully synchronous interface for easier operation
• Burst counters increment addresses internally
• Dual Chip Enables for easy depth expansion
• Automatic power-down
• Commercial and Industrial temperature ranges
• Available in 100-pin TQFP
• Pb-Free packages available
(max.)
— Active= 115 mA (typical)
— Standby= 10 µA (typical)
— Shorten cycle times
— Minimize bus noise
— Supported in Flow-Through and Pipelined modes
Control
I/O
3.3V 32K/64K/128K x 8/9
San Jose
0
Counter/
Address
Register
Decode
,
CY7C09079V/89V/99V
CY7C09179V/89V/99V
CA 95134
0/1
1
1
0
0/1
8/9
Revised May 18, 2005
15/16/17
[1]
/7.5
408-943-2600
A
I/O
[1]
0
–A
/9/12 ns
CNTRST
0R
FT/Pipe
CNTEN
14/15/16R
–I/O
[3]
ADS
R/W
CLK
CE
CE
OE
[2]
7/8R
0R
1R
R
R
R
R
R
R
R
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CY7C09189V-12AC Summary of contents

Page 1

... A –A for 128K devices Cypress Semiconductor Corporation Document #: 38-06043 Rev. *B 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5 (max.) • 3.3V low operating power — Active= 115 mA (typical) — Standby= 10 µA (typical) • Fully synchronous interface for easier operation • ...

Page 2

Functional Description The CY7C09079V/89V/99V and CY7C09179V/89V/99V are high-speed synchronous CMOS 32K, 64K, and 128K x 8/9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any [4] location in memory. Registers on control, ...

Page 3

... Typical Standby Current 25 for I (mA) (Both SB1 Ports TTL Level) 10 µA Typical Standby Current for I (µA) (Both Ports SB3 CMOS Level) Notes: 8. This pin is NC for CY7C09179V. 9. This pin is NC for CY7C09179V and CY7C09189V. Document #: 38-06043 Rev. *B 100-Pin TQFP (Top View ...

Page 4

Pin Definitions Left Port Right Port A –A A –A Address Inputs (A 0L 16L 0R 16R ADS ADS Address Strobe Input. Used as an address qualifier. This signal should be asserted LOW access the part using ...

Page 5

Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage ( –4.0 mA Output LOW Voltage ( +4.0 mA Input HIGH Voltage IH V Input LOW ...

Page 6

AC Test Loads 3. 590Ω OUTPUT 435Ω (a) Normal Load (Load 1) AC Test Loads (Applicable to -6 and -7 only 50Ω 50Ω 0 OUTPUT ...

Page 7

Switching Characteristics Over the Operating Range Parameter Description f f Flow-Through MAX1 Max f f Pipelined MAX2 Max t Clock Cycle Time - Flow-Through CYC1 t Clock Cycle Time - Pipelined CYC2 t Clock HIGH Time - Flow-Through CH1 t ...

Page 8

Switching Waveforms (continued) Read Cycle for Flow-Through Output (FT/PIPE = CH1 CLK R ADDRESS t CD1 DATA OUT t ...

Page 9

Switching Waveforms (continued) [20, 21] Bank Select Pipelined Read - t CYC2 t t CH2 CL2 CLK ADDRESS A (B1 0(B1) DATA OUT(B1 ADDRESS A ...

Page 10

Switching Waveforms (continued) Pipelined Read-to-Write-to-Read ( CYC2 t t CH2 CL2 CLK R ADDRESS DATA IN DATA OUT Pipelined ...

Page 11

Switching Waveforms (continued) Flow-Through Read-to-Write-to-Read ( CYC1 t t CH1 CL1 CLK R ADDRESS DATA IN t CD1 DATA ...

Page 12

Switching Waveforms (continued) Pipelined Read with Address Counter Advance t CYC2 t t CH2 CL2 CLK ADDRESS SAD HAD ADS CNTEN t t SCN HCN DATA OUT ...

Page 13

Switching Waveforms (continued) Write with Address Counter Advance (Flow-Through or Pipelined Outputs) t CYC2 t t CH2 CL2 CLK ADDRESS n INTERNAL A n ADDRESS t t SAD HAD ADS CNTEN t t SCN HCN ...

Page 14

Switching Waveforms (continued) [19, 26, 32, 33] Counter Reset (Pipelined Outputs) t CYC2 t t CH2 CL2 CLK ADDRESS INTERNAL A X ADDRESS SAD HAD ADS t t SCN HCN CNTEN t t SRST HRST ...

Page 15

Read/Write and Enable Operation Inputs OE CLK Address Counter Control Operation Previous Address Address CLK ADS ...

Page 16

... Speed (ns) Ordering Code [1] 6.5 CY7C09189V-6AC CY7C09189V-6AXC [1] 7.5 CY7C09189V-7AC 9 CY7C09189V-9AC 12 CY7C09189V-12AC CY7C09189V-12AXC Document #: 38-06043 Rev. *B Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack ...

Page 17

... Document #: 38-06043 Rev. *B © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 18

... CY7C09079V/89V/99V CY7C09179V/89V/99V Description of Change Change from Spec number: 38-00667 to 38-06043 Power up requirements added to Operating Conditions Information Added Pb-Free Logo Added Pb-Free Part Ordering Information: CY7C09089V-6AXC, CY7C09089V-12AXC, CY7C09099V-6AXC, CY7C09099V-7AI, CY7C09099V-7AXI, CY7C09099V-12AXC, CY7C09179V-6AXC, CY7C09179V-12AXC, CY7C09189V-6AXC, CY7C09189V-12AXC, CY7C09199V-6AXC, CY7C09199V-7AXC, CY7C09199V-9AXC, CY7C09199V-9AXI, CY7C09199V-12AXC Page [+] Feedback ...

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