CY7C09189V-12AC Cypress Semiconductor Corp, CY7C09189V-12AC Datasheet - Page 14

• Manufacturer Part Number: CY7C09189V-12AC
• Description: SRAM Chip Sync Dual 3.3V 576K-Bit 64K x 9-Bit 25ns/12ns 100-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09189V-12AC

• Package: 100TQFP
• Timing Type: Synchronous
• Density: 576 Kb
• Data Rate Architecture: SDR
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 16 Bit
• Number Of I/o Lines: 9 Bit
• Number Of Ports: 2
• Number Of Words: 64K

Document #: 38-06043 Rev. *B
Switching Waveforms
Counter Reset (Pipelined Outputs)
Notes:
32. CE
33. No dead cycle exists during counter reset. A READ or WRITE cycle may be coincidental with the counter reset.
INTERNAL
ADDRESS
ADDRESS
DATA
CNTRST
CNTEN
DATA
0
= V
ADS
CLK
R/W
OUT
IN
IL
; CE
t
t
t
SRST
SCN
SAD
1
= V
A
X
IH
.
t
CH2
COUNTER
t
t
t
HRST
HAD
HCN
RESET
t
(continued)
CYC2
t
CL2
t
t
SW
SD
[19, 26, 32, 33]
D
0
t
t
HW
HD
ADDRESS 0
WRITE
0
ADDRESS 0
READ
ADDRESS 1
READ
1
t
CY7C09079V/89V/99V
CY7C09179V/89V/99V
Q
SA
0
A
n
t
HA
ADDRESS n
READ
A
n
Q
A
n+1
1
Page 14 of 18
A
n+1
Q
n
[+] Feedback