PEB20320H-V34RF Infineon Technologies, PEB20320H-V34RF Datasheet - Page 159

• Manufacturer Part Number: PEB20320H-V34RF
• Description: IC CONTROLR 32-CH HDLC 160-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB20320H-V34RF

• Function: Multichannel Network Interface Controller (MUNICH)
• Interface: HDLC, ISDN, V.110, X.30
• Voltage - Supply: 5V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BSQFP
• Includes: Automatic Flag Detection, CRC Generation and Checking, Error Detection, Interframe-Time-Fill Change Detection
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Power (watts): -
• Number Of Circuits: -
• Other names: PEB20320H-V34RF; PEB20320H-V34RFIN

TRV:
FA:
MODE:
IFTF:
FRDA:
User’s Manual
Transmission Rate of V.110/X.30. These signals determine the number of
repeated D-bits in a V.110/X.30 frame.
Table 9
TRV
00
01
10
11
Note: In the other modes these bits must be set to ‘00’.
Flag Adjustment selected (in HDLC mode) or flag filtering (selected in
transparent mode A only if all fill/mask bits of the corresponding slots are ‘1’).
In all other modes this bit must be set to ‘0’. If flag adjustment is selected in
HDLC mode the number of interframe time-fill characters is FNUM minus one
eighth of the number of zero insertions in the frame proceeding the interframe
time-fill and belonging to the same transmit descriptor as FNUM.
If flag filtering is selected and fills a physical time slot in transparent mode A
the flag specified in TFLAG is recognized and extracted from the data stream.
In transmit direction the flag TFLAG is sent in all exception conditions, i.e.
abort, idle state etc.; if flag filtering is not selected ‘1’-bits are sent in this case.
Flag filtering is only allowed if all fill/mask codes are set to ‘1’, i.e.
subchanneling is not allowed.
If flag filtering is not selected the bits in TFLAG have to be set to 0 for TMA.
Defines the transmission mode:
11: HDLC mode
10: V.110/X.30 mode
00: Transparent mode A
01: Transparent mode B or transparent mode R.
Interframe Time-Fill: this bit determines the interframe time-fill for
HDLC mode:
IFTF = 0:AE
IFTF = 1:FF
First Receive Descriptor Address points to the beginning of the
receive data chaining list.
This descriptor is only interpreted with a fast receive abort or a receive jump
or a receive initialization command. It is read but ignored with any other
receive channel command.
H
H
No. of Repetitions
7
3
1
0
characters are sent as interframe time-fill.
characters are sent as interframe time-fill
159
600 bit/s
1200 bit/s
2400 bit/s
4.8, 9.6, 19.2, 38.4 kbit/s
Transmission Rate
Detailed Register Description
PEB 20320
01.2000