SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 133
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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ARM DDI0198D
The address and chip-select inputs to the ROM are pipelined with respect to the
ARM926EJ-S TCM interface outputs. An address incrementer is used to generate
sequential addresses. The output of the incrementer is captured at the end of every cycle
where the ROM CS chip select is active. The address source for the ROM is switched
over to the registered version of IRADDR when a nonsequential access occurs.
Figure 5-17 on page 5-26 shows the timing of the ROM address, chip-select, and read
data relative to the ARM926EJ-S TCM interface signals. The address supplied to the
ROM can either be behind, in sync with, or ahead of IRADDR, depending on the type
of memory access and the presence of idle cycles.
Figure 5-16 TCM subsystem that uses wait states for nonsequential accesses
Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM926EJ-S
IRADDR[17:0]
IRRD[31:0]
IRWAIT
IRSEQ
IRCS
EN
1
0
+1
Tightly-Coupled Memory Interface
CS
A
RD
ROM
5-25
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