AD5737 Analog Devices, AD5737 Datasheet - Page 25

• Manufacturer Part Number: AD5737
• Description: Quad Channel, 12-Bit, Serial Input, 4-20mA Output DAC with Dynamic Power Control and HART Connectivity
• Manufacturer: Analog Devices

Specifications of AD5737

• Resolution (bits): 12bit
• Dac Settling Time: 15µs
• Max Pos Supply (v): +33V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

Data Sheet
DATA REGISTERS
The input shift register is 24 bits wide. When PEC is enabled,
the input shift register is 32 bits wide, with the last eight bits
corresponding to the PEC code (see the Packet Error Checking
section for more information about PEC). When writing to a
data register, the format shown in Table 10 must be used.
Table 10. Input Shift Register for a Write Operation to a Data Register
MSB
D23
R/W
Table 11. Descriptions of Data Register Bits[D23:D16]
Bit Name
R/W
DUT_AD1, DUT_AD0
DREG2, DREG1, DREG0
DAC_AD1, DAC_AD0
Table 12. Programming the DAC Data Register
D23
R/W
1
X = don’t care.
D22
DUT_AD1
D22
DUT_AD1
addressed by the system controller.
D21
DUT_AD0
Description
This bit indicates whether the addressed register is written to or read from.
0 = write to the addressed register.
1 = read from the addressed register.
Used in association with the external pins AD1 and AD0, these bits determine which
DUT_AD1
0
0
1
1
These bits select the register to be written to. If a control register is selected (DREG[2:0] = 111), the CREG bits in
the control register select the specific control register to be written to (see Table 19).
DREG2
0
0
0
0
1
1
1
1
These bits are used to specify the DAC channel. If a write to the part does not apply to a specific DAC channel,
these bits are don’t care bits.
DAC_AD1
0
0
1
1
D21
DUT_AD0
DUT_AD0
0
1
0
1
DREG1
0
0
1
1
0
0
1
1
DAC_AD0
0
1
0
1
D20
0
D20
DREG2
Part Addressed
Pin AD1 = 0, Pin AD0 = 0
Pin AD1 = 0, Pin AD0 = 1
Pin AD1 = 1, Pin AD0 = 0
Pin AD1 = 1, Pin AD0 = 1
DREG0
0
1
0
1
0
1
0
1
DAC Channel
DAC A
DAC B
DAC C
DAC D
D19
0
Rev. A | Page 25 of 44
D19
DREG1
D18
0
Function
Write to DAC data register (one DAC channel)
Reserved
Write to gain register (one DAC channel)
Write to gain registers (all DAC channels)
Write to offset register (one DAC channel)
Write to offset registers (all DAC channels)
Write to clear code register (one DAC channel)
Write to a control register
DAC Data Register
When writing to a DAC data register, Bit D15 to Bit D4 are the
DAC data bits. Table 12 shows the register format, and Table 11
describes the functions of Bit D23 to Bit D16.
D18
DREG0
D17
DAC_AD1
D17
DAC_AD1
D16
DAC_AD0
D16
DAC_AD0
AD5737
D15 to D4
DAC data
device is being
AD5737
D3 to D0
X
D15 to D0
Data
1
LSB