ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 133

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ST72561J6-Auto

Manufacturer Part Number
ST72561J6-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J6-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
ST72561-Auto
13.3.4
4
5
When the timer clock is f
counter value equals the OCiR register value plus 1 (see
The output compare functions can be used both for generating external events on the
OCMPi pins even if the input capture mode is also used.
The value in the 8-bit OC
successful comparison in order to control an output waveform or establish a new elapsed
timeout.
Forced compare output capability
When the FOLVi bit is set by software, the OLVLi bit is copied to the OCMPi pin. The OLVi bit
has to be toggled in order to toggle the OCMPi pin when it is enabled (OCiE bit = 1). The
OCFi bit is then not set by hardware, and thus no interrupt request is generated.
The FOLVLi bits have no effect in both one pulse mode and PWM mode.
Figure 65. Output compare block diagram
Figure 66. Output compare timing diagram, f
8-bit
8 BIT
OC1R Register
OUTPUT COMPARE
8-bit
CIRCUIT
OC2R Register
FREE RUNNING
COUNTER
OUTPUT COMPARE REGISTER i (OCRi)
8-bit
OUTPUT COMPARE FLAG i (OCFi)
CPU
i
R register and the OLVi bit should be changed after each
OCMPi PIN (OLVLi = 1)
COUNTER REGISTER
/4, f
Doc ID 12370 Rev 8
OC1E
CPU
TIMER CLOCK
f
CPU
OCIE
/8 or f
OC2E
OCF1
CLOCK
CPU
FOLV2 FOLV1
/8000, OCFi and OCMPi are set while the
CF
(Control Register 2) CR2
(Control Register 1) CR1
TIMER
OCF2
CC1
(Status Register) SR
OLVL2
D0
CC0
0
= f
Figure
D1
CPU
0
D3
OLVL1
/2
D2
0
67).
D3
Latch
Latch
1
2
8-bit timer (TIM8)
D4
OCMP2
OCMP1
Pin
Pin
133/324

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