TDA9884TS/V1,112 NXP Semiconductors, TDA9884TS/V1,112 Datasheet - Page 16

• Manufacturer Part Number: TDA9884TS/V1,112
• Description: IC IF-PLL I2C-BUS DEMOD 24-SSOP
• Manufacturer: NXP Semiconductors
• Type: Demodulatorr

Specifications of TDA9884TS/V1,112

• Package / Case: *
• Applications: Mobile Reception
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270308112; TDA9884TS/V1; TDA9884TS/V1

Philips Semiconductors
TDA9884_2
Product data sheet
8.2.1 Subaddress
8.2.2 Data byte for switching mode
8.2 Write format
Table 11.
[1]
Table 12.
If more than one data byte is transmitted, then auto-increment is performed: starting from
the transmitted subaddress and auto-increment of subaddress in accordance with the
order of
Table 13.
[1]
[2]
[3]
Table 14.
S
Symbol
S
Slave address
R/W = 0
A
Subaddress (SAD)
Data 1, data n
P
Register
SAD for switching mode
SAD for adjust mode
SAD for data mode
Bit
B7
B6
The auto-increment of the subaddress stops if the subaddress is 3.
X = don’t care.
Bit A7 = 1 is not allowed.
Bits A6 to A2 will be ignored by the internal hardware.
Byte 1
A6 to A0
slave
address
Table
I
Explanation of
Definition of the subaddress (second byte after slave address)
Bit description of SAD register for switching mode (SAD = 00)
2
C-bus write format (slave receive data)
13.
R/W
0
Function
START condition, generated by the master
see
write command, generated by the master
acknowledge bit, generated by the slave
see
8-bit data words, transmitted by the master
(see
STOP condition
Value
1
0
1
0
Rev. 02 — 12 May 2006
A
Table 11
Table 7
Table 13
MSB
A7
0
0
0
Table
[2]
I
Byte 2
A7 to A0
subaddress
2
C-bus controlled multistandard alignment-free IF-PLL
14,
A6
X
X
X
Description
output port 2 e.g. for SAW switching or AGC monitoring
high-impedance, disabled or HIGH
low-impedance, active or LOW
output port 1 e.g. for SAW switching or external AGC
input
high-impedance, disabled or HIGH
low-impedance, active or LOW
Table 15
[3]
A5
X
X
X
A
and
[3]
Table
Byte 3
bits 7 to 0
data 1
[1]
A4
X
X
X
[3]
17)
A3
X
X
X
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
[3]
A
A2
X
X
X
Byte n
bits 7 to 0
data 1
[3]
TDA9884
[1]
A1
0
0
1
A
LSB
A0
0
1
0
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P