TDA9884TS/V1,112 NXP Semiconductors, TDA9884TS/V1,112 Datasheet - Page 9

• Manufacturer Part Number: TDA9884TS/V1,112
• Description: IC IF-PLL I2C-BUS DEMOD 24-SSOP
• Manufacturer: NXP Semiconductors
• Type: Demodulatorr

Specifications of TDA9884TS/V1,112

• Package / Case: *
• Applications: Mobile Reception
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270308112; TDA9884TS/V1; TDA9884TS/V1

Philips Semiconductors
TDA9884_2
Product data sheet
7.4 FPLL detector
7.5 VCO and divider
7.6 AFC and digital acquisition help
very long time constant for VIF gain increase is because the peak white level may appear
only once in a field. In order to reduce this time constant, an additional level detector
increases the discharging current of the AGC capacitor (fast mode) in the event of a
decreasing VIF amplitude step controlled by the detected actual black level voltage. The
threshold level for fast mode AGC is typically 6 dB video amplitude. The fast mode state
is also transferred to the SIF-AGC detector for speed-up. In case of missing peak white
pulses, the VIF gain increase is limited to typically +3 dB by comparing the detected
actual black level voltage with a corresponding reference voltage.
The VIF amplifier output signal is fed into a frequency detector and into a phase detector
via a limiting amplifier for removing the video AM.
During acquisition the frequency detector produces a current proportional to the
frequency difference between the VIF and the VCO signals. After frequency lock-in the
phase detector produces a current proportional to the phase difference between the VIF
and the VCO signals. The currents from the frequency and phase detectors are charged
into the loop filter which controls the VIF VCO and locks it to the frequency and phase of
the VIF carrier.
For a positive modulated VIF signal, the charging currents are gated by the composite
sync in order to avoid signal distortion in case of overmodulation. The gating depth is
switchable via the I
The VCO of the VIF-FPLL operates as an integrated low radiation relaxation oscillator at
double the picture carrier frequency. The control voltage, required to tune the VCO to
double the picture carrier frequency, is generated at the loop filter by the frequency phase
detector. The possible frequency range is 50 MHz to 140 MHz (typical value).
The oscillator frequency is divided-by-two to provide two differential square wave signals
with exactly 90 degrees phase difference, independent of the frequency, for use in the
FPLL detectors, the video demodulator and the intercarrier mixer.
Each relaxation oscillator of the VIF-PLL and FM-PLL demodulator has a wide frequency
range. To prevent false locking of the PLLs and with respect to the catching range, the
digital acquisition help provides an individual control, until the frequency of the VCO is
within the preselected standard dependent lock-in window of the PLL.
The in-window and out-window control at the FM-PLL is additionally used to mute the
audio stage (if auto mute is selected via the I
The working principle of the digital acquisition help is as follows. The PLL VCO output is
connected to a down counter which has a predefined start value (standard dependent).
The VCO frequency clocks the down counter for a fixed gate time. Thereafter, the down
counter stop value is analyzed. In case the stop value is higher (lower) than the expected
value range, the VCO frequency is lower (higher) than the wanted lock-in window
frequency range. A positive (negative) control current is injected into the PLL loop filter
and consequently the VCO frequency is increased (decreased) and a new counting cycle
starts.
2
C-bus.
Rev. 02 — 12 May 2006
I
2
C-bus controlled multistandard alignment-free IF-PLL
2
C-bus).
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
TDA9884
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