TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 462

no-image

TMP92xy29FG

Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy29FG

Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
(4) Low power consumption by control of CLK input signal
power consumption condition. But as system, this function enables low power
consumption by stopping source of CLK. CLK that is supplied to the UDC can be
controlled
USBCR1<USBCLKE>.
<INT_CLKSTOP> is set to “1”. After confirmation, stop CLK supply (USBCLK) by
setting “0” to USBCR1<USBCLKE>. If SUSPEND condition is released by resuming
from host, supply normal CLK to UDC within 3 ms.
before use. When doubler circuit is used as generation source, the above control is
needed.
When the UDC switches to suspend condition, it stops CLK and switches to low
When remote wakeup is used, it is necessary to supply a stable CLK to the UDC
If UDC switches to suspend condition, USBINTFR1<INT_SUS> is set to “1”, and
by
using
92CF29A-460
USBINTFR1<INT_SUS>,
<INT_CLKSTOP>
TMP92CF29A
2009-06-11
and

Related parts for TMP92xy29FG