TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 762

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

6.2
(1) AM0 and AM1 pins
(2) Reserved address areas
(3) Standby mode (IDLE1)
(4) Warm-up timer
(5) Watchdog timer
(6) AD converter
(7) CPU (Micro DMA)
(8) Undefined SFR
(9) POP SR instruction
Notes
Do not alter the level when the pin is active.
cannot be used since it is reserved for use as internal area. If using an emulator, an optional
64 Kbytes of the 16M bytes area is used for emulator control. Therefore, if using an
emulator, this area cannot be used.
operates), RTC (Real-time-clock) and MLD (Melody-alarm-generator) operate. When
necessary, stop the circuit before the HALT instruction is executed.
external oscillator. As a result, a time equivalent to the warm-up time elapses between
input of the release request and output of the system clock.
watchdog timer when it is not to be used.
reduce power consumption. When STOP mode is used, disable the resistor using the
program before the HALT instruction is executed.
registers in the CPU (e.g., the transfer source address register (DMASn).).
These pins are connected to the V
The 144Kbyte area (022000H~045FFFH) and 16 bytes area (FFFFF0H ∼ FFFFFFH)
When the HALT instruction is executed in IDLE1 mode (in which only the oscillator
The warm-up timer operates when STOP mode is released, even if the system is using an
The watchdog timer starts operation immediately after a reset is released. Disable the
The string resistor between the VREFH and VREFL pins can be cut by program so as to
Only the “LDC cr, r” and “LDC r, cr” instructions can be used to access the control
The value of an undefined bit in an SFR is undefined when read.
Please execute the POP SR instruction during DI condition.
92CF29A-760
CC
(Power supply level) or the V
SS
(Grand level) pin.
TMP92CF29A
2009-06-11