TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 748

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TMP92xy29FG

Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy29FG

Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
TB1RG0H
TB1RG1H
TB1CP0H
TB1CP1H
TB1RG0L
TB1RG1L
TB1CP0L
TB1CP1L
Symbol
TB1MOD
TB1RUN
(15) 16-bit timer (2/2)
TMRB1
RUN
register
TMRB1
MODE
register
16 bit timer
register 0
low
16 bit timer
register 0
high
16 bit timer
register low
16 bit timer
register 1
high
Capture
register 0
low
Capture
register 0
high
Capture
register 1
low
Capture
register 1
high
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
119AH
119BH
119CH
119DH
119EH
1190H
1192H
1198H
1199H
119FH
RMW)
RMW)
RMW)
RMW)
RMW)
Double
buffer
0: disable
1: enable
Always write “00”.
TB1RDE
R/W
7
0
0
R/W
Always
write “0”.
R/W
6
0
0
92CF29A-746
Software
capture
control
0: Execute
1: Undefined
TB1CP0I TB1CPM1 TB1CPM0
W*
5
1
Capture timing
00: Disable
01: TB1IN0 ↑
10: TB1IN0 ↑ TB1IN0 ↓
11: TA3OUT ↑
TA3OUT ↓
INT7 occurs at rising
edge
INT7 occurs at rising
edge
INT7 occurs at rising
edge
INT7 occurs at falling
edge
4
0
Undefined
Undefined
Undefined
Undefined
W
W
W
W
R
R
R
R
0
0
0
0
IDLE2
0: Stop
1: Operate
I2TB1
R/W
0
3
0
Control Up
counter
0:Clear
1:Clear
TMRB1
prescaler
0: Stop and clear
1: Run (Count up)
TB1PRUN
TB1CLE
Disable
Enable
R/W
R/W
0
2
0
TMRB1 source clock
00: TB1IN0 input
01: φ T1
10: φ T4
11: φ T16
TB1CLK1 TB1CLK0
TMP92CF29A
0
1
2009-06-11
Up counter
(UC12)
TB1RUN
R/W
0
0
0

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