adc1010s125hn/c1 NXP Semiconductors, adc1010s125hn/c1 Datasheet - Page 26
adc1010s125hn/c1
Manufacturer Part Number
adc1010s125hn/c1
Description
Single 10-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1010S125HNC1.pdf
(36 pages)
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Table 19.
AddrHex Register name
0005
0006
0008
0011
0012
0013
0014
0015
0016
0017
0020
0021
0022
operating mode
Output data
standard
Output clock
Test pattern 1
Test pattern 2
CMOS output
Reset and
Clock
Internal reference
Offset
Test pattern 3
Fast OTR
LVDS DDR O/P 1
LVDS DDR O/P 2
Register allocation map
11.6.3 Register allocation map
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit definition
Bit 7
SW_RST
TESTPAT_
USER[1:0]
-
-
-
-
-
-
-
-
-
-
Bit 6 Bit 5
-
-
-
-
-
-
-
-
-
-
DAVI_x2_EN
RESERVED[2:0]
-
-
-
-
-
-
-
-
Bit 4
SE_SEL
LVDS_
CMOS
-
-
-
-
-
-
TESTPAT_USER[9:2]
DAVI[1:0]
Bit 3
BIT_BYTE_WISE
INTREF_EN
FASTOTR
DIFF_SE
OUTBUF
DAVINV
DIG_OFFSET[5:0]
-
-
-
DAV_DRV[1:0]
Bit 2
OUTBUS_
DATAI_
x2_EN
SWAP
-
-
-
LVDS_INT_TER[2:0]
FASTOTR_DET[2:0]
TESTPAT_SEL[2:0]
DAVPHASE[2:0]
INTREF[2:0]
Bit 1
CLKDIV
DATA_FORMAT[1:0]
DATA_DRV[1:0]
OP_MODE[1:0]
-
DATAI[1:0]
Bit 0
DCS_EN 0000
-
Default
Bin
0000
0000
0001
0000
0000
0000
0000
0000
1110
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
1110
0000
0000
0000
0000
0000
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