ep1c6t144i8es Altera Corporation, ep1c6t144i8es Datasheet - Page 59

• Manufacturer Part Number: ep1c6t144i8es
• Description: Cyclone Fpga Family
• Manufacturer: Altera Corporation

Preliminary Information
Altera Corporation
LVDS I/O Pins
A subset of pins in all four I/O banks supports LVDS interfacing. These
dual-purpose LVDS pins require an external-resistor network at the
transmitter channels in addition to 100- termination resistors on receiver
channels. These pins do not contain dedicated serialization or
deserialization circuitry; therefore, internal logic performs serialization
and deserialization functions.
Table 16
density.
Note to
(1)
MultiVolt I/O Interface
The Cyclone architecture supports the MultiVolt I/O interface feature,
which allows Cyclone devices in all packages to interface with systems of
different supply voltages. The devices have one set of V
internal operation and input buffers (V
output drivers (V
EP1C3
EP1C4
EP1C6
EP1C12
EP1C20
Table 16. Cyclone Device LVDS Channels
EP1C3 devices in the 100-pin TQFP package do not support the LVDS I/O
standard.
Table
Device
shows the total number of supported LVDS channels per device
16:
CCIO
).
Pin Count
100
144
324
400
144
240
256
240
256
324
324
400
CCINT
Cyclone FPGA Family Data Sheet
Number of LVDS Channels
), and four sets for I/O
103
129
103
129
CC
(1)
34
29
72
72
66
72
95
pins for
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