ep1c6t144i8es Altera Corporation, ep1c6t144i8es Datasheet - Page 9

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ep1c6t144i8es

Manufacturer Part Number
ep1c6t144i8es
Description
Cyclone Fpga Family
Manufacturer
Altera Corporation
Datasheet
Preliminary Information
Altera Corporation
Logic Elements
Figure 5. Cyclone LE
labpre/aload
labclkena1
labclkena2
Chip-Wide
labclk1
labclk2
labclr1
labclr2
Reset
data1
data2
data3
data4
addnsub
Clock Enable
Asynchronous
Clear/Preset/
Load Logic
Clock &
LAB Carry-In
Select
Carry-In1
Carry-In0
Look-Up
The smallest unit of logic in the Cyclone architecture, the LE, is compact
and provides advanced features with efficient logic utilization. Each LE
contains a four-input LUT, which is a function generator that can
implement any function of four variables. In addition, each LE contains a
programmable register and carry chain with carry select capability. A
single LE also supports dynamic single bit addition or subtraction mode
selectable by an LAB-wide control signal. Each LE drives all types of
interconnects: local, row, column, LUT chain, register chain, and direct
link interconnects. See
Table
(LUT)
Chain
Carry
Register chain
routing from
previous LE
Carry-Out0
Carry-Out1
LAB Carry-Out
Synchronous
LAB-wide
Synchronous
Load
Figure
Clear Logic
Load and
Synchronous
LAB-wide
Clear
5.
Register Bypass
Packed
Register Select
Cyclone FPGA Family Data Sheet
ADATA
D
ENA
PRN/ALD
CLRN
Register
Feedback
Q
Programmable
Register
LUT chain
routing to next LE
Row, column,
and direct link
routing
Row, column,
and direct link
routing
Local Routing
Register chain
output
9

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