mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 110

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Low-Voltage Inhibit (LVI)
11.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V
V
continually entering and exiting reset if V
V
11.3.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects the LVI to be configured for 3-V protection.
110
Addr.
$FE0C
DD
TRIPF
rises above the rising trip point voltage, V
by the hysteresis voltage, V
Register Name
LVI Status Register
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V
Electrical Specifications
See page 111.
FROM CONFIG1
ALWAYS = 0
(LVISR)
DETECTOR
LOW V
LVI5OR3
V
DD
DD
Reset:
Read:
Write:
Figure 11-1. LVI Module Block Diagram
TRIPF
Figure 11-2. LVI I/O Register Summary
V
V
DD
DD
LVIOUT
FROM CONFIG
HYS
MC68HC908GR8B Data Sheet, Rev. 3.0
> LVI
Bit 7
ALWAYS = 0
LVI
LVIPWRD
0
[3 V]) may be lower than this. See
Trip
Trip
.
for the actual trip point voltages.
DD
DD
= 0
= 1
= Unimplemented
fall below V
is approximately equal to V
6
0
0
TRIPR
NOTE
LVIOUT
. This prevents a condition in which the MCU is
TRIPF
5
0
0
STOP INSTRUCTION
FROM CONFIG1
ALWAYS = 0
LVIRSTD
), the LVI will maintain a reset condition until
4
0
0
TRIPF
Chapter 19
3
0
0
FROM CONFIG1
. V
LVISTOP
LVI RESET
TRIPR
2
0
0
Freescale Semiconductor
is greater than
1
0
0
Bit 0
0
0

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